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Linear & low-dropout (LDO) regulators

TPS74401

ACTIVE

3-A, low-VIN (0.8-V), low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator

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Data sheet

TPS74401

ACTIVE
Data sheet Order now

Product details

Rating Catalog Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Features Enable, Power good, Soft start Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 120 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 5.5 Vin (min) (V) 0.8 Iout (max) (A) 3 Output options Adjustable Output Vout (max) (V) 3.6 Vout (min) (V) 0.8 Noise (µVrms) 20 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 3 Features Enable, Power good, Soft start Thermal resistance θJA (°C/W) 27 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 1 Dropout voltage (Vdo) (typ) (mV) 120 Operating temperature range (°C) -40 to 125
TO-263 (KTW) 7 153.924 mm² (10.1 mm × 15.24 mm) VQFN (RGR) 20 12.25 mm² (3.5 mm × 3.5 mm) VQFN (RGW) 20 25 mm² (5 mm × 5 mm)
  • Input voltage range: 1.1V to 5.5V
  • Adjustable start-up in-rush control
  • 1% accuracy over line, load, and temperature

  • VBIAS permits low VIN operation with good transient response

  • Adjustable output: 0.8V to 3.6V
  • Ultra-low dropout:
    • 115mV (typical, legacy chip) at 3.0A
    • 120mV (typical, new chip) at 3.0A
  • Stable with any or no output capacitor (legacy chip)

  • Stable with any output capacitor ≥2.2µF (new chip)

  • Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
  • Packages:
    • 5mm × 5mm × 1mm VQFN (RGW)
    • 3.5mm × 3.5mm VQFN (RGR), and DDPAK-7 (legacy chip)
  • Input voltage range: 1.1V to 5.5V
  • Adjustable start-up in-rush control
  • 1% accuracy over line, load, and temperature

  • VBIAS permits low VIN operation with good transient response

  • Adjustable output: 0.8V to 3.6V
  • Ultra-low dropout:
    • 115mV (typical, legacy chip) at 3.0A
    • 120mV (typical, new chip) at 3.0A
  • Stable with any or no output capacitor (legacy chip)

  • Stable with any output capacitor ≥2.2µF (new chip)

  • Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
  • Packages:
    • 5mm × 5mm × 1mm VQFN (RGW)
    • 3.5mm × 3.5mm VQFN (RGR), and DDPAK-7 (legacy chip)

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management option for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. Complete flexibility lets the user configure a plan that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is stable without an output capacitor (legacy chip) or with any type of capacitor ≥ 2.2µF (new chip). The device is fully specified from TJ = –40°C to +125°C.

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management option for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. Complete flexibility lets the user configure a plan that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The device is stable without an output capacitor (legacy chip) or with any type of capacitor ≥ 2.2µF (new chip). The device is fully specified from TJ = –40°C to +125°C.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet TPS74401 3.0A, Ultra-LDO With Programmable Soft-Start datasheet (Rev. T) PDF | HTML Apr 24, 2025
White paper Demystifying LDO Turn-On (Start-Up) Time (Rev. B) PDF | HTML Mar 10, 2026
Application note LDO Noise Demystified (Rev. B) PDF | HTML Aug 18, 2020
Application note Using Thermal Calculation Tools for Analog Components (Rev. A) Aug 30, 2019
Application note A Topical Index of TI LDO Application Notes (Rev. F) Jun 27, 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) Mar 21, 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML Aug 9, 2017
Analog design Journal LDO noise examined in detail Sep 25, 2012
Analog design Journal 4Q 2012 Issue Analog Applications Journal Sep 25, 2012
Application note Power Solution Using Discrete DC/DC Converters and LDOs (Rev. B) Aug 26, 2010
Application note Power Ref Design for TMS320C6472, 12-Vin Digital Pwr Cntrlrs, and LDOs (Rev. A) May 24, 2010
Application note Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOs Apr 28, 2010
Application note 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472) Mar 26, 2010
Application note Using New Thermal Metrics Dec 15, 2009
Analog design Journal A 3-A, 1.2-Vout linear regulator with 80% efficiency and Plost < 1W Oct 10, 2006

Design & development

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TPS74401 Unencrypted PSpice Transient Model

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Package Pins CAD symbols, footprints & 3D models
TO-263 (KTW) 7 Ultra Librarian
VQFN (RGR) 20 Ultra Librarian
VQFN (RGW) 20 Ultra Librarian
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