Product details

Technology family TXB Applications GPIO Bits (#) 8 Data rate (max) (MBits) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXB Applications GPIO Bits (#) 8 Data rate (max) (MBits) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 20 6.1875 mm² 2.25 x 2.75 NFBGA (NME) 20 7.5 mm² 2.5 x 3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 USON (DQS) 20 8 mm² 4 x 2 VQFN (RGY) 20 15.75 mm² 4.5 x 3.5
  • 1.2 V to 3.6 V on A Port and 1.65 V to 5.5 V on B Port (VCCA ≤ VCCB)
  • VCC Isolation Feature – If Either VCC Input Is at GND, All Outputs Are in the High-Impedance State
  • OE Input Circuit Referenced to VCCA
  • Low Power Consumption, 4-µA Max ICC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2000-V Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
    • B Port
      • ±15-kV Human-Body Model (A114-B)
      • ±8-kV Human-Body Model (A114-B) (YZP Package Only)
      • 1000-V Charged-Device Model (C101)
  • 1.2 V to 3.6 V on A Port and 1.65 V to 5.5 V on B Port (VCCA ≤ VCCB)
  • VCC Isolation Feature – If Either VCC Input Is at GND, All Outputs Are in the High-Impedance State
  • OE Input Circuit Referenced to VCCA
  • Low Power Consumption, 4-µA Max ICC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2000-V Human-Body Model (A114-B)
      • 1000-V Charged-Device Model (C101)
    • B Port
      • ±15-kV Human-Body Model (A114-B)
      • ±8-kV Human-Body Model (A114-B) (YZP Package Only)
      • 1000-V Charged-Device Model (C101)

This 8-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA should not exceed VCCB.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXB0108 is designed so that the OE input circuit is supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power-up or power-down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This 8-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA should not exceed VCCB.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXB0108 is designed so that the OE input circuit is supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power-up or power-down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet TXB0108 8-Bit Bidirectional Voltage-Level Translator with Auto-Direction Sensing and ±15-kV ESD Protection datasheet (Rev. H) PDF | HTML 25 Aug 2020
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 28 Mar 2018
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 19 Nov 2017
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 30 Oct 2017
Application note A Guide to Voltage Translation With TXS-Type Translators 29 Jun 2010
Application note A Guide to Voltage Translation With TXB-Type Translators 03 Mar 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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User guide: PDF | HTML
Not available on TI.com
Evaluation board

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User guide: PDF | HTML
Not available on TI.com
Evaluation board

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User guide: PDF | HTML
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Evaluation board

TXB-EVM — 1 to 8 bit TXB translator family evaluation module

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User guide: PDF | HTML
Not available on TI.com
Simulation model

HSPICE Model for TXB0108 (Rev. A)

SCEJ242A.ZIP (101 KB) - HSpice Model
Simulation model

TXB0108 IBIS Model (Rev. G)

SCEM518G.ZIP (205 KB) - IBIS Model
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Schematic: PDF
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Reference designs

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Package Pins Download
DSBGA (YZP) 20 View options
NFBGA (NME) 20 View options
TSSOP (PW) 20 View options
USON (DQS) 20 View options
VQFN (RGY) 20 View options

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