TIDEP0034

66AK2L06 DSP+ARM Processor with JESD204B Attach to Wideband ADCs and DACs

TIDEP0034

Design files

Overview

For developers currently using an FPGA or ASIC to connect to high speed data converters who need faster time to market with increased performance and significant reduction in cost, power, and size this reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End (DFE) processing. Connecting to the ADC12J4000 and DAC38J84 provides an efficient solution for Test & Measurement and Defense applications.

Features
  • Easy integration of signal processor to data converters over JESD204B
  • Multichannel sampling rates up to 368Msps with 150MHz of processing bandwidth
  • Also available: DFE Signal Processing Bypass mode configuration from Azcom Technology (Ecosystem partner). Please request it here.
  • DFE processing for filtering, down-sampling or up-sampling
  • FFT/iFFT processing using FFTC accelerator
  • System optimized for Test & Measurement and Defense applications
  • Wideband sampling with JESD attached signal processing solution including DSP, ADC and DAC boards, demo software, configuration GUIs and Getting Started Guide
  • A robust demonstration and development platform including three EVMs, a deterministic latency card, schematic, BOM, user guide, benchmarks, software and demos

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDU946A.PDF (630 K)

Reference design overview and verified performance test data

TIDREK6.PDF (625 K)

Detailed schematic diagram for design layout and components

TIDREK7.PDF (120 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRKG5.ZIP (2281 K)

Files used for 3D models or 2D drawings of IC components

Products

Includes TI products in the design and potential alternatives.

Digital signal processors (DSPs)

66AK2L06Multicore DSP+ARM KeyStone II System-on-Chip (SoC)

Data sheet document-pdfAcrobat PDF
Clock jitter cleaners & synchronizers

LMK04828Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Data sheet document-pdfAcrobat PDF open-in-new HTML
High-speed ADCs (>10MSPS)

ADC12J400012-Bit, 4.0-GSPS, RF Sampling Analog-to-Digital Converter (ADC)

Data sheet document-pdfAcrobat PDF open-in-new HTML
High-speed DACs (>10MSPS)

DAC38J84Quad-Channel, 16-Bit, 2.5-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)

Data sheet document-pdfAcrobat PDF
N-channel MOSFETs

CSD17483F430-V, N channel NexFET™ power MOSFET, single LGA 1 mm x 0.6 mm, 260 mOhm, gate ESD protection

Data sheet document-pdfAcrobat PDF open-in-new HTML

Technical documentation

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Type Title Date
Application note 66AK2L06 JESD Attach to ADC12J4000/DAC38J84 Getting Started Guide (Rev. B) Jun. 20, 2016
White paper Optimizing your test and measurement solution by leveraging the most integrated Nov. 03, 2015
Design guide 66AK2L06 JESD Attach to ADC12J4000 / DAC38J84 Design Guide (Rev. A) Oct. 22, 2015
Application note System solution for avionics & defense Sep. 23, 2015
More literature Emulation Wiki -- In-depth technical and "how-to" articles, FAQs, etc. Mar. 24, 2011

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