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Product details

Parameters

DSP 4 C66x Operating system Integrity, Linux, SYS/BIOS, VxWorks On-chip L2 cache/RAM 1024 KB (ARM Cluster), 1024 KB (per C66x DSP core) Other on-chip memory 3072 KB DRAM DDR3, DDR3L Ethernet MAC 4-port 1Gb Switch PCI/PCIe 2 PCIe Gen2 Serial I/O I2C, PCIe, SPI, UART, USB SPI 3 I2C 3 USB 1 Arm MHz (Max.) 1200 Arm CPU 2 ARM Cortex-A15 Video port (configurable) NULL UART (SCI) 4 Rating Catalog open-in-new Find other C6000 DSP + Arm processors

Features

  • Four TMS320C66x DSP Core Subsystems (C66x
    CorePacs), Each With
    • 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point
      DSP Core
      • 38.4 GMacs/Core for Fixed Point @ 1.2 GHz
      • 19.2 GFlops/Core for Floating Point @ 1.2
        GHz
    • Memory
      • 32K Byte L1P Per CorePac
      • 32K Byte L1D PerCorePac
      • 1024K Byte Local L2 Per CorePac
  • ARM CorePac
    • Two ARM® Cortex®-A15 MPCore™ Processors
      at Up to 1.2 GHz
    • 1MB L2 Cache Memory Shared by Two ARM
      Cores
    • Full Implementation of ARMv7-A Architecture
      Instruction Set
    • 32KB L1 Instruction and Data Caches per Core
    • AMBA 4.0 AXI Coherency Extension (ACE)
      Master Port, Connected to MSMC for Low
      Latency Access to Shared MSMC SRAM
  • Multicore Shared Memory Controller (MSMC)
    • 2 MB SRAM Memory Shared by Four DSP
      CorePacs and One ARM CorePac
    • Memory Protection Unit for Both MSM SRAM
      and DDR3_EMIF
  • On-chip Standalone RAM (OSR) - 1MB On-Chip
    SRAM for Additional Shared Memory
  • Hardware Coprocessors
    • Two Fast Fourier Transform Coprocessors
      • Support Up to 1200 Msps at FFT Size 1024
      • Support Max FFT Size 8192
  • Multicore Navigator
    • 8k Multi-Purpose Hardware Queues with Queue
      Manager
    • Packet-Based DMA for Zero-Overhead
      Transfers
  • Network Coprocessor
    • Packet Accelerator Enables Support for
      • 1 Gbps Wire Speed Throughput at 1.5
        MPackets Per Second
    • Security AcceleratorEngine Enables Support for
      • IPSec, SRTP, and SSL/TLS Security
      • ECB, CBC, CTR, F8,CCM, GCM, HMAC,
        CMAC, GMAC, AES, DES, 3DES, SHA-1,
        SHA-2 (256-bit Hash), MD5
      • Up to 6.4 Gbps IPSec
    • Ethernet Subsystem
    • Peripherals
      • DigitalFront End (DFE) Subsystem
        • Support up to Four Lane JESD204A/B (7.37
          Gbps Line Rate Max.) Interface to Multiple
          Data Converters
        • Integration of Digital Down/Up-Conversion
          (DDC/DUC) Module
      • IQNet Subsystem
        • Transporting data streams to an integrated
          Digital Front End (DFE)
      • Two One-Lane PCIe Gen2 Interfaces
        • Supports Up to 5 GBaud
      • Three Enhanced Direct Memory Access (EDMA)
        Controllers
      • 72-Bit DDR3 Interface, Speeds Up to 1600 MHz
      • EMIF16 Interface
      • USB 3.0 Interface
      • USIM Interface
      • Four UART Interfaces
      • Three I2C Interfaces
      • 64 GPIO Pins
      • Three SPI Interfaces
      • Semaphore Module
      • Fourteen 64-Bit Timers
    • Commercial Case Temperature:
      • 0°C to 100°C
    • Extended Case Temperature:
      • –40°C to 100°C
open-in-new Find other C6000 DSP + Arm processors

Description

The 66AK2L06 KeyStone SoC is a member of the C66x family based on TI's new KeyStone II Multicore SoC Architecture and is a low-power solution with integrated JESD204B lanes that meets the more stringent power, size, and cost requirements of applications requiring connectivity with ADC and DAC based applications. The device’s ARM and DSP cores deliver exceptional processing power on platforms requiring high signal and control processing.

TI’s KeyStone II Architecture provides a programmable platform integrating various subsystems (ARM CorePac, C66x CorePacs, IP network, Digital Front End, and FFT processing) and uses a queue-based communication system that allows the SoC resources to operate efficiently and seamlessly. This unique SoC architecture also includes a TeraNet switch that enables the wide mix of system elements, from programmable cores to dedicated coprocessors and high-speed IO, to each operate at maximum efficiency with no blocking or stalling.

The addition of the ARM CorePac in the 66AK2L06 device enables the ability for complex control code processing on-chip. Operations such as housekeeping and management processing can be performed with the Cortex-A15 processor.

TI’s new C66x core launches a new era of DSP technology by combining fixed-point and floating-point computational capability in the processor without sacrificing speed, size, or power consumption. The raw computational performance is an industry-leading 38.4 GMACS/core and 19.2 Gflops/core (@ 1.2 GHz operating frequency). The C66x is also 100% backward compatible with software for C64x+ devices. The C66x CorePac incorporates 90 new instructions targeted for floating point (FPi) and vector math oriented (VPi) processing.

The 66AK2L06 contains many coprocessors to offload the bulk of the processing demands of higher layers of application. This keeps the cores free for algorithms and other differentiating functions. The SoC contains multiple copies of key coprocessors such as the FFTC. The architectural elements of the SoC (Multicore Navigator) ensure that data is processed without any CPU intervention or overhead, allowing the system to make optimal use of its resources.

TI’s scalable multicore SoC architecture solutions provide developers with a range of software-compatible and hardware-compatible devices to minimize development time and maximize reuse.

The 66AK2L06 device has a complete set of development tools that includes: a C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows and Linux debugger interface for visibility into source code execution.

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Support through a third party

This product does not have ongoing direct design support from TI. For support while working through your design, you may contact one of the following third parties: Azcom Technology, CommAgility.

Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet 66AK2L06 Multicore DSP+ARM KeyStone II System-on-Chip (SoC) datasheet Apr. 21, 2015
* Errata 66AK2Lxx Multicore DSP+ARM KeyStone II SOC (Silicon Revision 1.0) Apr. 20, 2015
Application note Keystone Error Detection and Correction EDC ECC Aug. 12, 2019
Application note Using Arm ROM Bootloader on Keystone II Devices Jun. 04, 2019
White paper Sitara Processor Security (Rev. D) May 09, 2019
Application note DDR3 Design Requirements for KeyStone Devices (Rev. C) Jan. 23, 2018
User guide KeyStone II Architecture Universal Serial Bus 3.0 (USB 3.0) (Rev. A) Aug. 21, 2017
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) Aug. 14, 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) Jul. 26, 2017
Selection guide TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017
User guide Wideband Receiver With 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design Sep. 23, 2016
Application note Keystone EDMA FAQ Sep. 01, 2016
Third party documents Download XEVMK2LX schematics, bill of materials and design guide Aug. 03, 2016
Third party documents XEVMK2LX Quick Setup Guide Aug. 03, 2016
User guide Serializer/Deserializer (SerDes) for KeyStone II Devices User Guide (Rev. A) Jul. 27, 2016
Application note Power Management of KS2 Device (Rev. C) Jul. 15, 2016
Application note 66AK2L06 JESD Attach to ADC12J4000/DAC38J84 Getting Started Guide (Rev. B) Jun. 20, 2016
Technical articles How to complete your RF sampling solution May 18, 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices Apr. 13, 2016
Technical articles Accelerating the Fast Fourier Transform (FFT/iFFT) by 10x and more Mar. 02, 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs Feb. 23, 2016
Application note TI DSP Benchmarking Jan. 13, 2016
Application note Throughput Performance Guide for KeyStone II Devices (Rev. B) Dec. 22, 2015
White paper Optimizing Modern Radar Systems using Low- Latency, High-Performance FFT Coproce Dec. 17, 2015
Technical articles Are 66AK2L06 SoCs an answer to miniaturization of test and measurement equipment? Dec. 02, 2015
White paper Optimizing your test and measurement solution by leveraging the most integrated Nov. 03, 2015
User guide 66AK2L06 JESD Attach to ADC12J4000 / DAC38J84 Design Guide (Rev. A) Oct. 22, 2015
Application note Keystone II DDR3 Debug Guide Oct. 16, 2015
Application note System solution for avionics & defense Sep. 23, 2015
Application note TPS544Bxx/TPS544Cxx Powering TCI6630K2L in Smart Reflex Class 0 TC Mode Sep. 18, 2015
Technical articles Summertime showdown: DSPs vs FPGAs Jul. 09, 2015
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) May 06, 2015
User guide Gigabit Ethernet (GbE) Switch SS for K2E & K2L Devices User's Guide (Rev. A) Apr. 28, 2015
More literature 66AK2L06 SoC Product Bulletin Apr. 15, 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) Apr. 09, 2015
White paper Optimizing synthetic aperture radar design with TI's integrated 66AK2L06 SoC Apr. 09, 2015
User guide DDR3 Memory Controller for KeyStone II Devices User's Guide (Rev. C) Mar. 27, 2015
User guide Digital Front End (DFE) for Keystone II Devices User's Guide (Rev. A) Mar. 23, 2015
White paper Ready to make the jump to JESD204B? White Paper (Rev. B) Mar. 19, 2015
User guide Fast Fourier Transform Coprocessor (FFTC) for KeyStone II Devices User's Guide (Rev. A) Feb. 11, 2015
Application note Keystone II DDR3 Initialization Jan. 26, 2015
User guide IQN2 for KeyStone II Devices User's Guide (Rev. A) Oct. 01, 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) Sep. 04, 2014
User guide Packet Accelerator 2 (PA2) for K2E and K2L Devices User's Guide Aug. 19, 2014
User guide Security Accelerator 2 (SA2) for K2E and K2L Devices User's Guide Aug. 19, 2014
User guide Network Coprocessor (NETCP) for K2E and K2L Devices User's Guide Aug. 13, 2014
Application note Hardware Design Guide for KeyStone II Devices Mar. 24, 2014
User guide Debug and Trace for KeyStone II Devices User's Guide Jul. 26, 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) Jul. 15, 2013
User guide C66x CorePac User's Guide (Rev. C) Jun. 28, 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) Jun. 28, 2013
User guide Multicore Shared Memory Controller (MSMC) User Guide for KeyStone II Devices Nov. 12, 2012
User guide ARM CorePac User Guide for KeyStone II Devices Oct. 31, 2012
Application note Multicore Programming Guide (Rev. B) Aug. 29, 2012
User guide Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) Apr. 24, 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) Mar. 30, 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) Mar. 27, 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) Mar. 22, 2012
Application note PCIe Use Cases for KeyStone Devices Dec. 13, 2011
Application note Introduction to TMS320C6000 DSP Optimization Oct. 06, 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide Sep. 02, 2011
User guide External Memory Interface (EMIF16) for KeyStone Devices User's Guide (Rev. A) May 24, 2011
White paper Software and Hardware Design Challenges Due to Dynamic Raw NAND Market May 19, 2011
User guide C66x CPU and Instruction Set Reference Guide Nov. 09, 2010
User guide C66x DSP Cache User's Guide Nov. 09, 2010
Application note Clocking Design Guide for KeyStone Devices Nov. 09, 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide Nov. 09, 2010
Application note Optimizing Loops on the C66x DSP Nov. 09, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
2055
Description

The XEVMK2LX is a full-featured evaluation and development tool for 66AK2Lx Keystone II based SoCs. Get started developing high speed data generation and acquisition systems for avionics and defense, test and measurement, medical, sonar and imaging applications today with this Wide PICMG ® AMC (...)

Features
  • Example Applications: Avionics, defense, radar, test and measurement, portable ultrasound systems, sonar and imaging
  • Board size: Double Wide PICMG ® AMC form factor (7.11" x 2.89")
  • DDR memory: 2 GB ECC DDR3 1600 on board (non SO-DIMM)
  • Development environment: Code Composer Studio™ version 5 (CCSv5)
  • (...)
DEBUG PROBE Download
XDS200 USB Debug Probe
TMDSEMU200-U
295
Description

The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)

Features

The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)

DEBUG PROBE Download
995
Description

The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBE Download
1495
Description

The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

Software development

SOFTWARE DEVELOPMENT KIT (SDK) Download
Processor SDK for 66AK2LX Processors - Linux and TI-RTOS support
PROCESSOR-SDK-K2L

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

Features

Linux features

  • Open Linux support
  • Linux kernel and Bootloaders
  • File system
  • GUI-based application launcher
  • Example applications, including:
    • ARM benchmarks: Dhrystone, Linpack, Whetstone
    • Cryptography: AES, 3DES, MD5, SHA
  • Host tools including flash utility
  • Code Composer Studio™ IDE for Linux development
  • (...)

SOFTWARE DEVELOPMENT KIT (SDK) Download
Radio Frequency Software Developer Kit (RFSDK)
RFSDK Texas Instruments Radio Frequency Software Development Kit (RFSDK) is a collection of highly optimized APIs and highly abstracted commands to control, configure and manage the JESD204B interface, digital front end (DFE), analog front end (AFE) and high speed data converters (ADC/DAC). The RFSDK (...)
DRIVER OR LIBRARY Download
DSP Math Library for Floating Point Devices
MATHLIB — The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Features
  • Types of functions included:
    • Trigonometric and hyperbolic: Sin, Cos, Tan, Arctan, etc.
    • Power, exponential, and logarithmic
    • Reciprocal
    • Square root
    • Division
  • Natural C Source Code
  • Optimized C code with Intrinsics
  • Hand-coded assembly-optimized routines
  • C-callable routines, which can be inlined and are fully (...)
DRIVER OR LIBRARY Download
TMS320C5000/6000 Image Library (IMGLIB)
SPRC264 C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Image Analysis

  • Image boundry and perimeter
  • Morphological operation
  • Edge detection
  • Image Histogram
  • Image thresholding

Image filtering and format conversion

  • Color space conversion
  • Image convolution
  • Image correlation
  • Error diffusion
  • Median filtering
  • Pixel expansion

Image compression and decompression

  • Forward and (...)
DRIVER OR LIBRARY Download
TMS320C6000 DSP Library (DSPLIB)
SPRC265 TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Features

Optimized DSP routines including functions for:

  • Adaptive filtering
  • Correlation
  • FFT
  • Filtering and convolution: FIR, biquad, IIR, convolution
  • Math: Dot products, max value, min value, etc.
  • Matrix operations
SOFTWARE CODEC Download
CODECS- Video, Speech - for C66x-based Devices
C66XCODECS TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. In many cases, the C64x+ codecs are provided and validated for C66x platforms. Datasheets and Release Notes are on the download (...)
Features
  • Field-hardened and tested
  • LINUX and WINDOWS installers
  • XDC packaged and validated on a standard EVM in a Codec Engine-based test
  • Both encoder and decoder are available
  • All codecs are eXpressDSP™ compliant and implement one of the XDM 1.x interfaces
  • Performance data specified in each codec Datasheet
Encode (...)

Design tools & simulation

SIMULATION MODEL Download
SPRM589.ZIP (3192 KB) - IBIS Model
SIMULATION MODEL Download
SPRM656.ZIP (169 KB) - Power Model
SIMULATION MODEL Download
SPRM743.ZIP (265889 KB) - IBIS-AMI Model

Reference designs

REFERENCE DESIGNS Download
Optimized Radar System Reference Design Using a DSP+ARM SoC
TIDEP0060 — For modern radar system developers currently using an FPGA or ASIC to connect to high speed data converters, who need faster time to market with increased performance and significant reduction in cost, power, and size, this reference design includes the first widely available processor integrating a (...)
document-generic Schematic
REFERENCE DESIGNS Download
Wideband Receiver Design Using 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design
TIDEP0081 — For wideband receiver system developers currently using FPGA or ASIC to connect High Speed data converters to a baseband processor, who need faster time to market with increased performance and significant reduction in cost, power, and size. This reference design includes the first widely available (...)
document-generic Schematic
REFERENCE DESIGNS Download
66AK2L06 DSP+ARM Processor with JESD204B Attach to Wideband ADCs and DACs
TIDEP0034 For developers currently using an FPGA or ASIC to connect to high speed data converters who need faster time to market with increased performance and significant reduction in cost, power, and size this reference design includes the first widely available processor integrating a JESD204B interface (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
(CMS) 900 View options

Ordering & quality

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  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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