SBOS671D September   2018  – December 2022 OPA2828 , OPA828

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Phase-Reversal Protection
      2. 7.3.2  Electrical Overstress
      3. 7.3.3  MUX Friendly Inputs
      4. 7.3.4  Overload Power Limiter
      5. 7.3.5  Noise Performance
        1. 7.3.5.1 Low Noise
      6. 7.3.6  Capacitive Load and Stability
      7. 7.3.7  Settling Time
      8. 7.3.8  Slew Rate
      9. 7.3.9  Full-Power Bandwidth
      10. 7.3.10 Small-Signal Response
      11. 7.3.11 Thermal Shutdown
      12. 7.3.12 Low Offset Voltage Drift
      13. 7.3.13 Overload Recovery
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 SAR ADC Driver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Low-Pass Filter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
        2. 8.4.1.2 PowerPAD™ Design Considerations (DGN package only)
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 Filter Design Tool
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Overstress

The OPAx828 are internally protected against electrostatic discharge (ESD) events that can occur during manufacturing, handling, or printed-circuit-board (PCB) assembly. The internal ESD protection diodes are not intended to protect the OPAx828 during normal operation when the devices are operating under power. The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where the diodes meet at the power-supply ESD cell, an absorption device, internal to the operational amplifiers. This protection circuitry is intended to remain inactive during normal circuit operation. In cases where the inputs or output can be driven above the positive power supply or below the negative power supply, make sure to limit the current through the internal diodes to 10 mA or less. In harsh electrical environments, external protection circuitry can be required depending on the application requirements and environmental conditions.

GUID-FEAA9F9D-D416-422B-97C8-7510432B37C2-low.gif Figure 7-2 Equivalent Internal ESD Circuitry

Figure 7-3 illustrates one example of protecting the OPAx828 inputs against an input overvoltage condition. In this example, the noninverting inputs to the OPAx828 are protected with the addition of an external resistor. If the input voltage, VIN, exceeds either power supply voltage, the input ESD diodes become forward biased at approximately 0.5 V. Limit the current through the forward-biased internal ESD diodes under such conditions; see Section 6.1. Figure 7-3 illustrates a specific example where the addition of the input resistor provides the necessary current limiting and allows for input voltages at VIN up to ±25.5 V. Assuming a symmetrical, dual power-supply configuration, the maximum input voltage for this circuit configuration can be determined from the following equation:

Equation 1. GUID-55C04859-7327-43CB-8EC3-9B2970BCCD9E-low.gif
GUID-7C077473-1BBA-4CC3-9758-AF053DB6D7CA-low.gifFigure 7-3 Limiting the Input Current

Adding a series input protection resistor adds an additional source of noise to the circuit. Resistance values less than 250 Ω contribute less than 10% of additional noise. A resistance value of 1 kΩ increases the noise by approximately by 40%. The OPAx828 have an equivalent input noise resistance of approximately 1 kΩ.