JAJSSJ5 December 2023 DRV8234
PRODUCTION DATA
Table 7-27 lists the memory-mapped registers for the DRV8234_STATUS registers. All register offset addresses not listed in Table 7-27 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
0h | FAULT | Various fault registers' status. | Section 7.6.1.1 |
1h | RC_STATUS1 | Ripple Counting Status Registers - 1. | Section 7.6.1.2 |
2h | RC_STATUS2 | Ripple Counting Status Registers - 2. | Section 7.6.1.3 |
3h | RC_STATUS3 | Ripple Counting Status Registers - 3. | Section 7.6.1.4 |
4h | REG_STATUS1 | Regulation Status Registers - (1/3). | Section 7.6.1.5 |
5h | REG_STATUS2 | Regulation Status Registers - (2/3). | Section 7.6.1.6 |
6h | REG_STATUS3 | Regulation Status Registers - (3/3). | Section 7.6.1.7 |
Complex bit access types are encoded to fit into small table cells. Table 7-28 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Reset or Default Value | ||
-n | Value after reset or the default value |
FAULT is shown in Table 7-29.
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Status of various fault and protection bits.
RC_STATUS1 is shown in Table 7-30.
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Speed estimated by the ripple counting algorithm.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | SPEED | R | 0h | Outputs the motor speed estimated by the ripple counting algorithm. |
RC_STATUS2 is shown in Table 7-31.
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Output corresponding to number of current ripples (1/2).
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | RC_CNT_7:0 | R | 0h | Lower half 8-bit output out of the 16-bit output of the ripple counter corresponding to the number of current ripples. |
RC_STATUS3 is shown in Table 7-32.
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Output corresponding to number of current ripples (2/2).
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | RC_CNT_15:8 | R | 0h | Upper half 8-bit output out of the 16-bit output of the ripple counter corresponding to the number of current ripples. |
REG_STATUS1 is shown in Table 7-33.
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Value corresponding to the output voltage across the motor terminals.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | VMTR | R | 0h | Outputs the voltage across the motor terminals, maximum value FFh. 00h corresponds to 0 V and E4h corresponds to 38 V. |
REG_STATUS2 is shown in Table 7-34.
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Output corresponding to current flowing through the motor.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | IMTR | R | 0h | Outputs the current flowing through the motor. 00h corresponds to 0 A and C0h corresponds to the maximum value set by the CS_GAIN_SEL bits. |
REG_STATUS3 is shown in Table 7-35.
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Internal pwm duty cycle and device id.