JAJSSJ5 December   2023 DRV8234

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Operating Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 External Components
      2. 7.3.2 Summary of Features
      3. 7.3.3 Bridge Control
      4. 7.3.4 Current Sense and Regulation (IPROPI)
        1. 7.3.4.1 Current Sensing
        2. 7.3.4.2 Current Regulation
          1. 7.3.4.2.1 Fixed Off-Time Current Regulation
          2. 7.3.4.2.2 Cycle-By-Cycle Current Regulation
      5. 7.3.5 Stall Detection
      6. 7.3.6 Ripple Counting
        1. 7.3.6.1 Ripple Counting Parameters
          1. 7.3.6.1.1  Motor Resistance Inverse
          2. 7.3.6.1.2  Motor Resistance Inverse Scale
          3. 7.3.6.1.3  KMC Scaling Factor
          4. 7.3.6.1.4  KMC
          5. 7.3.6.1.5  Filter Damping Constant
          6. 7.3.6.1.6  Filter Input Scaling Factor
          7. 7.3.6.1.7  Ripple Count Threshold
          8. 7.3.6.1.8  Ripple Count Threshold Scale
          9. 7.3.6.1.9  T_MECH_FLT
          10. 7.3.6.1.10 VSNS_SEL
          11. 7.3.6.1.11 Error Correction
            1. 7.3.6.1.11.1 EC_FALSE_PER
            2. 7.3.6.1.11.2 EC_MISS_PER
        2. 7.3.6.2 RC_OUT Output
        3. 7.3.6.3 Ripple Counting with nFAULT
      7. 7.3.7 Motor Voltage and Speed Regulation
        1. 7.3.7.1 Internal Bridge Control
        2. 7.3.7.2 Setting Speed/Voltage Regulation Parameters
          1. 7.3.7.2.1 Speed and Voltage Set
          2. 7.3.7.2.2 Speed Scaling Factor
        3. 7.3.7.3 Soft-Start and Soft-Stop
          1. 7.3.7.3.1 TINRUSH
      8. 7.3.8 Protection Circuits
        1. 7.3.8.1 Overcurrent Protection (OCP)
        2. 7.3.8.2 Thermal Shutdown (TSD)
        3. 7.3.8.3 VM Undervoltage Lockout (VM UVLO)
        4. 7.3.8.4 Overvoltage Protection (OVP)
        5. 7.3.8.5 nFAULT Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Low-Power Sleep Mode
      3. 7.4.3 Fault Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Communication
        1. 7.5.1.1 I2C Write
        2. 7.5.1.2 I2C Read
    6. 7.6 Register Map
      1. 7.6.1 DRV8234_STATUS Registers
      2. 7.6.2 DRV8234_CONFIG Registers
      3. 7.6.3 DRV8234_CTRL Registers
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: Brushed DC Motor
      1. 8.2.1 Design Requirements
      2. 8.2.2 Stall Detection
        1. 8.2.2.1 Application Description
          1. 8.2.2.1.1 Stall Detection Timing
          2. 8.2.2.1.2 Hardware Stall Threshold Selection
      3. 8.2.3 Ripple Counting Application
        1. 8.2.3.1 Tuning Ripple Counting Parameters
          1. 8.2.3.1.1 Resistance Parameters
          2. 8.2.3.1.2 KMC and KMC_SCALE
            1. 8.2.3.1.2.1 Case I
            2. 8.2.3.1.2.2 Case II
              1. 8.2.3.1.2.2.1 Method 1: Tuning from Scratch
                1. 8.2.3.1.2.2.1.1 Tuning KMC_SCALE
                2. 8.2.3.1.2.2.1.2 Tuning KMC
              2. 8.2.3.1.2.2.2 Method 2: Using the Proportionality factor
                1. 8.2.3.1.2.2.2.1 Working Example
          3. 8.2.3.1.3 Advanced Parameters
            1. 8.2.3.1.3.1 Filter Constants
              1. 8.2.3.1.3.1.1 FLT_GAIN_SEL
              2. 8.2.3.1.3.1.2 FLT_K
            2. 8.2.3.1.3.2 T_MECH_FLT
            3. 8.2.3.1.3.3 VSNS_SEL
            4. 8.2.3.1.3.4 Additional Error Corrector Parameters
              1. 8.2.3.1.3.4.1 EC_FALSE_PER
              2. 8.2.3.1.3.4.2 EC_MISS_PER
      4. 8.2.4 Motor Voltage
      5. 8.2.5 Motor Current
      6. 8.2.6 Application Curves
  10. Power Supply Recommendations
    1. 9.1 Bulk Capacitance
  11. 10Layout
    1. 10.1 Layout Guidelines
  12. 11Device and Documentation Support
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 用語集
  13. 12Revision History

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Internal Bridge Control

For voltage regulation, an internal circuit monitors the voltage difference between the output pins. This voltage difference is integrated over time to get an average DC voltage value. The time depends on the cut-off frequency of the output filter which can be set by the OUT_FLT register. For best results, choose a cut-off frequency setting equal to at least ten times the PWM frequency.

The DC voltage value is compared to the target motor voltage programmed by the I2C register, WSET_VSET. During voltage as well as speed regulation modes, an internal bridge control scheme is employed. PMODE is used to select the PH/EN mode or the PWM mode.

When Voltage or Speed Regulation mode is active, DUTY_CTRL must be set to 0b. Bridge control is internal in this case. Duty cycle can be programmed by using the IN_DUTY register.

  • If the averaged output voltage is lower than VSET, the duty cycle of the internal bridge control output is increased.

  • If the averaged output voltage is higher than VSET, the duty cycle of the internal bridge control output is decreased.

  • During PWM regulation, the H-bridge is enabled to drive current through the motor winding during the PWM on time. The current flow direction depends on the EN/IN1 and PH/IN2 polarity.

  • During the PWM off time, winding current is recirculated by enabling both of the low-side FETs in the bridge.

  • If the programmed output voltage (VSET) is greater than the VM supply voltage, the device operates at 100% duty cycle and the voltage regulation feature is disabled. In this mode, the device behaves like a conventional H-bridge driver.

Note:

The IN_DUTY register outputs the actual duty cycle of the internal bridge control scheme in voltage regulation mode. PWM_FREQ sets the PWM frequency for internal PWM generation.

Setting DUTY_CTRL to 1b enables the user to program the duty cycle into EXT_DUTY for external bridge control. For using the internal bridge control scheme, DUTY_CTRL must be set to 0b. IN_DUTY can then be used to program the desired duty cycle.

Table 7-20 PWM_FREQ Settings
BitValue
0b25 kHz
1b50 kHz
Note:

In voltage regulation mode, the motor speed can vary slightly because the voltage drop across the motor coil resistance introduces a small error. The speed regulation mode eliminates this error by directly regulating the target motor speed. To enable speed regulation, the REG_CTRL bit must be set to 10b.