The I2C interface allows control
and monitoring of the DRV8234 by a microcontroller. The I2C bus consists of a data
line (SDA) and a clock line (SCL) with off-chip pull-up resistors. When the bus is idle, both
SDA and SCL lines are pulled high.
A leader device, usually a microcontroller or a digital signal
processor, controls the bus. The leader is responsible for generating the SCL signal and
device addresses. The leader also generates specific conditions that indicate the START and
STOP of data transfer. A follower device receives and/or transmits data on the bus under
control of the leader device. DRV8234 is a follower device.
The lower four bits of the device address are
derived from the inputs from the pins A1 and A0, which can be tied to board level power
supply for logic high, GND for logic low, or left open. These four address bits are latched
into the device at power up, so cannot be changed dynamically. The upper address bits of the
device address are fixed at 0x60h, so the device address is as follows -
Table 7-24 Device AddressesA1 Pin | A0 Pin | A3A2A1A0 bits | ADDRESS (WRITE) | ADDRESS (READ) |
---|
0 | 0 | 0000b | 0x60h | 0x61h |
0 | High-Z | 0001b | 0x62h | 0x63h |
0 | 1 | 0010b | 0x64h | 0x65h |
High-Z | 0 | 0011b | 0x66h | 0x67h |
High-Z | High-Z | 0100b | 0x68h | 0x69h |
High-Z | 1 | 0101b | 0x6Ah | 0x6Bh |
1 | 0 | 0110b | 0x6Ch | 0x6Dh |
1 | High-Z | 0111b | 0x6Eh | 0x6Fh |
1 | 1 | 1000b | 0x70h | 0x71h |
Using the A0 and A1 pins, up to 9 DRV8234
follower devices can be controlled by one I2C bus. The DRV8234 does not respond to
the general call address. It is recommended to use a 2.2kΩ pull-up resistor for these pins.