JAJSRI9A October   2023  – March 2024 LM51772

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Buck-Boost Control Scheme
        1. 8.3.1.1 Buck Mode
        2. 8.3.1.2 Boost Mode
        3. 8.3.1.3 Buck-Boost Mode
      2. 8.3.2  Power Save Mode
      3. 8.3.3  Programmable Conduction Mode PCM
      4. 8.3.4  Reference System
        1. 8.3.4.1 VIO LDO and nRST-PIN
      5. 8.3.5  Supply Voltage Selection – VMAX Switch and Selection Logic
      6. 8.3.6  Enable and Undervoltage Lockout
        1. 8.3.6.1 UVLO
        2. 8.3.6.2 VDET Comparator
      7. 8.3.7  Internal VCC Regulator
        1. 8.3.7.1 VCC1 Regulator
        2. 8.3.7.2 VCC2 Regulator
      8. 8.3.8  Error Amplifier and Control
        1. 8.3.8.1 Output Voltage Regulation
        2. 8.3.8.2 Internal Output Voltage Regulation
        3. 8.3.8.3 Dynamic Voltage Scaling
      9. 8.3.9  Short Circuit - Hiccup Protection
      10. 8.3.10 Current Monitor/Limiter
        1. 8.3.10.1 Overview
        2. 8.3.10.2 Output Current Limitation
        3. 8.3.10.3 Output Current Monitor
      11. 8.3.11 Oscillator Frequency Selection
      12. 8.3.12 Frequency Synchronization
      13. 8.3.13 Output Voltage Tracking
        1. 8.3.13.1 Analog Voltage Tracking
        2. 8.3.13.2 Digital Voltage Tracking
      14. 8.3.14 Slope Compensation
      15. 8.3.15 Configurable Soft Start
      16. 8.3.16 Drive Pin
      17. 8.3.17 Dual Random Spread Spectrum – DRSS
      18. 8.3.18 Gate Driver
      19. 8.3.19 Cable Drop Compensation (CDC)
      20. 8.3.20 CFG-pin and R2D Interface
      21. 8.3.21 Advanced Monitoring Features
        1. 8.3.21.1  Overview
        2. 8.3.21.2  BUSY
        3. 8.3.21.3  OFF
        4. 8.3.21.4  VOUT
        5. 8.3.21.5  IOUT
        6. 8.3.21.6  INPUT
        7. 8.3.21.7  TEMPERATURE
        8. 8.3.21.8  CML
        9. 8.3.21.9  OTHER
        10. 8.3.21.10 ILIM_OP
        11. 8.3.21.11 nFLT/nINT Pin Output
        12. 8.3.21.12 Status Byte
      22. 8.3.22 Protection Features
        1. 8.3.22.1  Thermal Shutdown (TSD)
        2. 8.3.22.2  Over Current Protection
        3. 8.3.22.3  Output Over Voltage Protection 1 (OVP1)
        4. 8.3.22.4  Output Over Voltage Protection 2 (OVP2)
        5. 8.3.22.5  Input Voltage Protection (IVP)
        6. 8.3.22.6  Input Voltage Regulation (IVR)
        7. 8.3.22.7  Power Good
        8. 8.3.22.8  Boot-Strap Under Voltage Protection
        9. 8.3.22.9  Boot-strap Over Voltage Clamp
        10. 8.3.22.10 CRC - CHECK
    4. 8.4 Device Functional Modes
      1. 8.4.1 Overview
      2. 8.4.2 Logic State Description
    5. 8.5 Programming
      1. 8.5.1 I2C Bus Operation
      2. 8.5.2 Clock Stretching
      3. 8.5.3 Data Transfer Formats
      4. 8.5.4 Single READ from a Defined Register Address
      5. 8.5.5 Sequential READ Starting from a Defined Register Address
      6. 8.5.6 Single WRITE to a Defined Register Address
      7. 8.5.7 Sequential WRITE Starting at a Defined Register Address
  10. 9 LM51772 Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design with WEBENCH Tools
        2. 10.2.2.2  Frequency
        3. 10.2.2.3  Feedback Divider
        4. 10.2.2.4  Inductor and Current Sense Resistor Selection
        5. 10.2.2.5  Output Capacitor
        6. 10.2.2.6  Input Capacitor
        7. 10.2.2.7  Slope Compensation
        8. 10.2.2.8  UVLO Divider
        9. 10.2.2.9  Soft-Start Capacitor
        10. 10.2.2.10 MOSFETs QH1 and QL1
        11. 10.2.2.11 MOSFETs QH2 and QL2
        12. 10.2.2.12 Loop Compensation
        13. 10.2.2.13 External Component Selection
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
        1. 10.4.1.1 Power Stage Layout
        2. 10.4.1.2 Gate Driver Layout
        3. 10.4.1.3 Controller Layout
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 LM51772 Registers

Table 9-1 lists the memory-mapped registers for the LM51772 registers. All register offset addresses not listed in Table 9-1 should be considered as reserved locations and the register contents should not be modified.

Table 9-1 LM51772 Registers
AddressAcronymRegister NameSection
0x3CLEAR_FAULTSCLEAR_FAULTSGo
0xAILIM_THRESHOLDILIM_THRESHOLDGo
0xCVOUT_TARGET1_LSBVOUT_TARGET1_LSBGo
0xDVOUT_TARGET1_MSBVOUT_TARGET1_MSBGo
0x21USB_PD_STATUS_0USB_PD_STATUS_0Go
0x78STATUS_BYTESTATUS_BYTEGo
0x81USB_PD_CONTROL_0USB_PD_CONTROL_0Go
0xD0MFR_SPECIFIC_D0MFR_SPECIFIC_D0Go
0xD1MFR_SPECIFIC_D1MFR_SPECIFIC_D1Go
0xD2MFR_SPECIFIC_D2MFR_SPECIFIC_D2Go
0xD3MFR_SPECIFIC_D3MFR_SPECIFIC_D3Go
0xD4MFR_SPECIFIC_D4MFR_SPECIFIC_D4Go
0xD5MFR_SPECIFIC_D5MFR_SPECIFIC_D5Go
0xD6MFR_SPECIFIC_D6MFR_SPECIFIC_D6Go
0xD7MFR_SPECIFIC_D7MFR_SPECIFIC_D7Go
0xD8MFR_SPECIFIC_D8MFR_SPECIFIC_D8Go
0xD9MFR_SPECIFIC_D9MFR_SPECIFIC_D9Go
0xDAIVP_VOLTAGEIVP_VOLTAGEGo

Complex bit access types are encoded to fit into small table cells. Table 9-2 shows the codes that are used for access types in this section.

Table 9-2 LM51772 Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
Reset or Default Value
-nValue after reset or the default value

9.1 CLEAR_FAULTS Register (Address = 0x3) [Reset = 0x00]

CLEAR_FAULTS is shown in Table 9-3.

Return to the Summary Table.

clear all latched status flags

Table 9-3 CLEAR_FAULTS Register Field Descriptions
BitFieldTypeResetDescription
7:0CLEAR_FAULTSR0x0accessing the address is enough to clear fault

9.2 ILIM_THRESHOLD Register (Address = 0xA) [Reset = 0x64]

ILIM_THRESHOLD is shown in Table 9-4.

Return to the Summary Table.

Table 9-4 ILIM_THRESHOLD Register Field Descriptions
BitFieldTypeResetDescription
7:0ILIM_THRESHOLDR/W0x64ISNS current limit threshold voltage. Value in bracket considers a 10mOhms sens resistor
0x0 = 5mV (0.5 A)
0x1 = 5mV (0.5 A)
0x2 = 5mV (0.5 A)
0x3 = 5mV (0.5 A)
0x4 = 5mV (0.5 A)
0x5 = 5mV (0.5 A)
0x6 = 5mV (0.5 A)
0x7 = 5mV (0.5 A)
0x8 = 5mV (0.5 A)
0x9 = 5mV (0.5 A)
0xA = 5mV (0.5 A)
0xB = 5.5mV (0.55 A)
0xC = 6mV (0.6 A)
0xD = 6.5mV (0.65 A)
0xE = 7mV (0.7 A)
0xF = 7.5mV (0.75 A)
0x10 = 8mV (0.8 A)
0x11 = 8.5mV (0.85 A)
0x12 = 9mV (0.9 A)
0x13 = 9.5mV (0.95 A)
0x14 = 10mV (1 A)
0x15 = 10.5mV (1.05 A)
0x16 = 11mV (1.1 A)
0x17 = 11.5mV (1.15 A)
0x18 = 12mV (1.2 A)
0x19 = 12.5mV (1.25 A)
0x1A = 13mV (1.3 A)
0x1B = 13.5mV (1.35 A)
0x1C = 14mV (1.4 A)
0x1D = 14.5mV (1.45 A)
0x1E = 15mV (1.5 A)
0x1F = 15.5mV (1.55 A)
0x20 = 16mV (1.6 A)
0x21 = 16.5mV (1.65 A)
0x22 = 17mV (1.7 A)
0x23 = 17.5mV (1.75 A)
0x24 = 18mV (1.8 A)
0x25 = 18.5mV (1.85 A)
0x26 = 19mV (1.9 A)
0x27 = 19.5mV (1.95 A)
0x28 = 20mV (2 A)
0x29 = 20.5mV (2.05 A)
0x2A = 21mV (2.1 A)
0x2B = 21.5mV (2.15 A)
0x2C = 22mV (2.2 A)
0x2D = 22.5mV (2.25 A)
0x2E = 23mV (2.3 A)
0x2F = 23.5mV (2.35 A)
0x30 = 24mV (2.4 A)
0x31 = 24.5mV (2.45 A)
0x32 = 25mV (2.5 A)
0x33 = 25.5mV (2.55 A)
0x34 = 26mV (2.6 A)
0x35 = 26.5mV (2.65 A)
0x36 = 27mV (2.7 A)
0x37 = 27.5mV (2.75 A)
0x38 = 28mV (2.8 A)
0x39 = 28.5mV (2.85 A)
0x3A = 29mV (2.9 A)
0x3B = 29.5mV (2.95 A)
0x3C = 30mV (3 A)
0x3D = 30.5mV (3.05 A)
0x3E = 31mV (3.1 A)
0x3F = 31.5mV (3.15 A)
0x40 = 32mV (3.2 A)
0x41 = 32.5mV (3.25 A)
0x42 = 33mV (3.3 A)
0x43 = 33.5mV (3.35 A)
0x44 = 34mV (3.4 A)
0x45 = 34.5mV (3.45 A)
0x46 = 35mV (3.5 A)
0x47 = 35.5mV (3.55 A)
0x48 = 36mV (3.6 A)
0x49 = 36.5mV (3.65 A)
0x4A = 37mV (3.7 A)
0x4B = 37.5mV (3.75 A)
0x4C = 38mV (3.8 A)
0x4D = 38.5mV (3.85 A)
0x4E = 39mV (3.9 A)
0x4F = 39.5mV (3.95 A)
0x50 = 40mV (4 A)
0x51 = 40.5mV (4.05 A)
0x52 = 41mV (4.1 A)
0x53 = 41.5mV (4.15 A)
0x54 = 42mV (4.2 A)
0x55 = 42.5mV (4.25 A)
0x56 = 43mV (4.3 A)
0x57 = 43.5mV (4.35 A)
0x58 = 44mV (4.4 A)
0x59 = 44.5mV (4.45 A)
0x5A = 45mV (4.5 A)
0x5B = 45.5mV (4.55 A)
0x5C = 46mV (4.6 A)
0x5D = 46.5mV (4.65 A)
0x5E = 47mV (4.7 A)
0x5F = 47.5mV (4.75 A)
0x60 = 48mV (4.8 A)
0x61 = 48.5mV (4.85 A)
0x62 = 49mV (4.9 A)
0x63 = 49.5mV (4.95 A)
0x64 = 50mV (5 A)
0x65 = 50.5mV (5.05 A)
0x66 = 51mV (5.1 A)
0x67 = 51.5mV (5.15 A)
0x68 = 52mV (5.2 A)
0x69 = 52.5mV (5.25 A)
0x6A = 53mV (5.3 A)
0x6B = 53.5mV (5.35 A)
0x6C = 54mV (5.4 A)
0x6D = 54.5mV (5.45 A)
0x6E = 55mV (5.5 A)
0x6F = 55.5mV (5.55 A)
0x70 = 56mV (5.6 A)
0x71 = 56.5mV (5.65 A)
0x72 = 57mV (5.7 A)
0x73 = 57.5mV (5.75 A)
0x74 = 58mV (5.8 A)
0x75 = 58.5mV (5.85 A)
0x76 = 59mV (5.9 A)
0x77 = 59.5mV (5.95 A)
0x78 = 60mV (6 A)
0x79 = 60.5mV (6.05 A)
0x7A = 61mV (6.1 A)
0x7B = 61.5mV (6.15 A)
0x7C = 62mV (6.2 A)
0x7D = 62.5mV (6.25 A)
0x7E = 63mV (6.3 A)
0x7F = 63.5mV (6.35 A)
0x80 = 64mV (6.4 A)
0x81 = 64.5mV (6.45 A)
0x82 = 65mV (6.5 A)
0x83 = 65.5mV (6.55 A)
0x84 = 66mV (6.6 A)
0x85 = 66.5mV (6.65 A)
0x86 = 67mV (6.7 A)
0x87 = 67.5mV (6.75 A)
0x88 = 68mV (6.8 A)
0x89 = 68.5mV (6.85 A)
0x8A = 69mV (6.9 A)
0x8B = 69.5mV (6.95 A)
0x8C = 70mV (7 A)
0x8D = 70mV (7 A)
0x8E = 70mV (7 A)
0x8F = 70mV (7 A)
0x90 = 70mV (7 A)
0x91 = 70mV (7 A)
0x92 = 70mV (7 A)
0x93 = 70mV (7 A)
0x94 = 70mV (7 A)
0x95 = 70mV (7 A)
0x96 = 70mV (7 A)
0x97 = 70mV (7 A)
0x98 = 70mV (7 A)
0x99 = 70mV (7 A)
0x9A = 70mV (7 A)
0x9B = 70mV (7 A)
0x9C = 70mV (7 A)
0x9D = 70mV (7 A)
0x9E = 70mV (7 A)
0x9F = 70mV (7 A)
0xA0 = 70mV (7 A)
0xA1 = 70mV (7 A)
0xA2 = 70mV (7 A)
0xA3 = 70mV (7 A)
0xA4 = 70mV (7 A)
0xA5 = 70mV (7 A)
0xA6 = 70mV (7 A)
0xA7 = 70mV (7 A)
0xA8 = 70mV (7 A)
0xA9 = 70mV (7 A)
0xAA = 70mV (7 A)
0xAB = 70mV (7 A)
0xAC = 70mV (7 A)
0xAD = 70mV (7 A)
0xAE = 70mV (7 A)
0xAF = 70mV (7 A)
0xB0 = 70mV (7 A)
0xB1 = 70mV (7 A)
0xB2 = 70mV (7 A)
0xB3 = 70mV (7 A)
0xB4 = 70mV (7 A)
0xB5 = 70mV (7 A)
0xB6 = 70mV (7 A)
0xB7 = 70mV (7 A)
0xB8 = 70mV (7 A)
0xB9 = 70mV (7 A)
0xBA = 70mV (7 A)
0xBB = 70mV (7 A)
0xBC = 70mV (7 A)
0xBD = 70mV (7 A)
0xBE = 70mV (7 A)
0xBF = 70mV (7 A)
0xC0 = 70mV (7 A)
0xC1 = 70mV (7 A)
0xC2 = 70mV (7 A)
0xC3 = 70mV (7 A)
0xC4 = 70mV (7 A)
0xC5 = 70mV (7 A)
0xC6 = 70mV (7 A)
0xC7 = 70mV (7 A)
0xC8 = 70mV (7 A)
0xC9 = 70mV (7 A)
0xCA = 70mV (7 A)
0xCB = 70mV (7 A)
0xCC = 70mV (7 A)
0xCD = 70mV (7 A)
0xCE = 70mV (7 A)
0xCF = 70mV (7 A)
0xD0 = 70mV (7 A)
0xD1 = 70mV (7 A)
0xD2 = 70mV (7 A)
0xD3 = 70mV (7 A)
0xD4 = 70mV (7 A)
0xD5 = 70mV (7 A)
0xD6 = 70mV (7 A)
0xD7 = 70mV (7 A)
0xD8 = 70mV (7 A)
0xD9 = 70mV (7 A)
0xDA = 70mV (7 A)
0xDB = 70mV (7 A)
0xDC = 70mV (7 A)
0xDD = 70mV (7 A)
0xDE = 70mV (7 A)
0xDF = 70mV (7 A)
0xE0 = 70mV (7 A)
0xE1 = 70mV (7 A)
0xE2 = 70mV (7 A)
0xE3 = 70mV (7 A)
0xE4 = 70mV (7 A)
0xE5 = 70mV (7 A)
0xE6 = 70mV (7 A)
0xE7 = 70mV (7 A)
0xE8 = 70mV (7 A)
0xE9 = 70mV (7 A)
0xEA = 70mV (7 A)
0xEB = 70mV (7 A)
0xEC = 70mV (7 A)
0xED = 70mV (7 A)
0xEE = 70mV (7 A)
0xEF = 70mV (7 A)
0xF0 = 70mV (7 A)
0xF1 = 70mV (7 A)
0xF2 = 70mV (7 A)
0xF3 = 70mV (7 A)
0xF4 = 70mV (7 A)
0xF5 = 70mV (7 A)
0xF6 = 70mV (7 A)
0xF7 = 70mV (7 A)
0xF8 = 70mV (7 A)
0xF9 = 70mV (7 A)
0xFA = 70mV (7 A)
0xFB = 70mV (7 A)
0xFC = 70mV (7 A)
0xFD = 70mV (7 A)
0xFE = 70mV (7 A)
0xFF = 70mV (7 A)

9.3 VOUT_TARGET1_LSB Register (Address = 0xC) [Reset = 0x58]

VOUT_TARGET1_LSB is shown in Table 9-5.

Return to the Summary Table.

Table 9-5 VOUT_TARGET1_LSB Register Field Descriptions
BitFieldTypeResetDescription
7:0VOUT_AR/W0x58Output target Voltage
Logical Register Vout Setting
Lower Limit: 3.3V
Upper Limit: 48 V
Step size: 20 mV or 10 mV depending on Section 9.16
Value Calculation for 20mV Table 9-18
Value Calculation for 10mV Table 9-18

9.4 VOUT_TARGET1_MSB Register (Address = 0xD) [Reset = 0x02]

VOUT_TARGET1_MSB is shown in Table 9-6.

Return to the Summary Table.

Table 9-6 VOUT_TARGET1_MSB Register Field Descriptions
BitFieldTypeResetDescription
7:4NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
3:0VOUT_AR/W0x2Output target Voltage
Logical Register Vout Setting
Lower Limit: 3.3V
Upper Limit: 48 V
Step size: 20 mV or 10 mV depending on MFR_SPECIFIC_D8 Register (Address = 0xD8) [Reset = 0x84]
Value Calculation for 20mV Table 9-18
Value Calculation for 10mV Table 9-18

9.5 USB_PD_STATUS_0 Register (Address = 0x21) [Reset = 0x00]

USB_PD_STATUS_0 is shown in Table 9-7.

Return to the Summary Table.

USB-PD STATUS REGISTER

Table 9-7 USB_PD_STATUS_0 Register Field Descriptions
BitFieldTypeResetDescription
7NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
6CC_OPERATIONR0x0Instantanous status for constant current (CC) ILIM operation
5:0 NIL R 0x0 This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.

9.6 STATUS_BYTE Register (Address = 0x78) [Reset = 0x00]

STATUS_BYTE is shown in Table 9-8.

Return to the Summary Table.

FAULT STATUS LOW BYTE

Table 9-8 STATUS_BYTE Register Field Descriptions
BitFieldTypeResetDescription
7BUSYR0x0unit is busy
0x0 = unit not busy
0x1 = unit busy
6OFFR0x0device not providing VOUT and/or unit is off
0x0 = unit on
0x1 = unit off
5VOUTR0x0VOUT_OV fault
0x0 = no fault
0x1 = fault
4IOUTR0x0IOUT_OC fault
0x0 = no fault
0x1 = fault
3INPUTR0x0VIN_UV fault
0x0 = no fault
0x1 = fault
2TEMPERATURER0x0Temperature fault or warning
0x0 = no fault
0x1 = fault
1CMLR0x0Comm, Logic, Memory event
0x0 = no fault
0x1 = fault
0OTHERR0x0other fault or warning
0x0 = no fault
0x1 = fault

9.7 USB_PD_CONTROL_0 Register (Address = 0x81) [Reset = 0x01]

USB_PD_CONTROL_0 is shown in Table 9-9.

Return to the Summary Table.

USB-PD CONTROL REGISTER

Table 9-9 USB_PD_CONTROL_0 Register Field Descriptions
BitFieldTypeResetDescription
7:2NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
1FORCE_DISCHR/W0x0Activates Vo discharge
0x0 = DISABLE
0x1 = ENABLE
0CONV_EN2R/W0x1Enables the power stage
0x0 = DISABLE
0x1 = ENABLE

9.8 MFR_SPECIFIC_D0 Register (Address = 0xD0) [Reset = 0x32]

MFR_SPECIFIC_D0 is shown in Table 9-10.

Return to the Summary Table.

CONFIG_0 Device Configuration Register 0

Table 9-10 MFR_SPECIFIC_D0 Register Field Descriptions
BitFieldTypeResetDescription
7NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
6EN_NEG_CL_LIMITR/W0x0Enables ILIM for negative current limit, If disabled ILIM clamps pos I_L
0x0 = DISABLE
0x1 = ENABLE
5EN_VCC1R/W0x1Enables the VCC1 auxiliary LDO
0x0 = DISABLE
0x1 = ENABLE
4IMON_LIMITER_ENR/W0x1Enables the Imon in limiter configuration
0x0 = DISABLE
0x1 = ENABLE
3HICCUP_ENR/W0x0Enables Hiccup short circuit
0x0 = DISABLE
0x1 = ENABLE
2DRSS_ENR/W0x0Enables Dual Spread Spectrum
0x0 = DISABLE
0x1 = ENABLE
1USLEEP_ENR/W0x1Enables micro sleep mode
0x0 = DISABLE
0x1 = ENABLE
0CONV_ENR/W0x0Enables the power stage
0x0 = DISABLE
0x1 = ENABLE

9.9 MFR_SPECIFIC_D1 Register (Address = 0xD1) [Reset = 0x09]

MFR_SPECIFIC_D1 is shown in Table 9-11.

Return to the Summary Table.

CONFIG_1 Device Configuration Register 1

Table 9-11 MFR_SPECIFIC_D1 Register Field Descriptions
BitFieldTypeResetDescription
7EN_THER_WARNR/W0x0Enables Thermal Warning
0x0 = DISABLE
0x1 = ENABLE
6:5THW_THRESHOLDR/W0x0Selects the Thermal Warning Threshold
0x0 = 140degC
0x1 = 125degC
0x2 = 110degC
0x3 = 95degC
4EN_NINTR/W0x0Conigures the nFLT pin handler to act as interupt pin or nFLT pin
0x0 = DISABLE
0x1 = ENABLE
3EN_DTRK_STARTOVERR/W0x1Enables a direct start-up if DTRK is enabled without waiting for the DTRK PWM signal
0x0 = DISABLE
0x1 = ENABLE
2FORCE_BIASPINR/W0x0Enables the priroty to supply VCC2 from BIAS by lowering the threshold.
0x0 = DISABLE
0x1 = ENABLE
1EN_BB_2P_FPWMR/W0x0Enables 2phase BB swiching in fPWM mode
0x0 = DISABLE
0x1 = ENABLE
0EN_BB_2P_PSMR/W0x1Enables 2phase BB swiching in PSM mode
0x0 = DISABLE
0x1 = ENABLE

9.10 MFR_SPECIFIC_D2 Register (Address = 0xD2) [Reset = 0x40]

MFR_SPECIFIC_D2 is shown in Table 9-12.

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Table 9-12 MFR_SPECIFIC_D2 Register Field Descriptions
BitFieldTypeResetDescription
7NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
6EN_ACTIVE_DVSR/W0x1Enables the active down ramp for DVS using the discharge
0x0 = DISABLE
0x1 = ENABLE
5:4DVS_SLEW_RAMPR/W0x0Sets the positive and negative Vo slew rate for DVS
0x0 = 40mV/us
0x1 = 20mV/us
0x2 = 1mV/us
0x3 = 0.5mV/us
3:2DISCHARGE_STRENGTHR/W0x0Sets the discharge current for the Vo discharge
0x0 = SLOW (25mA)
0x1 = MEDIUM (50mA)
0x2 = FAST (75mA)
0x3 = FAST (75mA)
1DISCHARGE_CONFIG0R/W0x0Selects the discharge together with CONV_EN
0x0 = DISABLE
0x1 = ENABLE
0DISCHARGE_CONFIG1R/W0x0Selects the discharge until the VTH DISCH
0x0 = DISABLE
0x1 = ENABLE

9.11 MFR_SPECIFIC_D3 Register (Address = 0xD3) [Reset = 0x20]

MFR_SPECIFIC_D3 is shown in Table 9-13.

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Table 9-13 MFR_SPECIFIC_D3 Register Field Descriptions
BitFieldTypeResetDescription
7EN_IVPR/W0x0Enabled input voltage protection.
0x0 = DISABLE
0x1 = ENABLE
6SEL_IVRR/W0x0Selected input voltage regulation instead of the input voltage protection.
0x0 = DISABLE
0x1 = ENABLE
5VDET_ENR/W0x1Enables internal VDET function
0x0 = DISABLE
0x1 = ENABLE
4:0VDET_FALLR/W0x0VDET falling threshold
0x0 = 2.7V
0x1 = 2.9V
0x2 = 3.1V
0x3 = 3.3V
0x4 = 3.5V
0x5 = 3.7V
0x6 = 3.9V
0x7 = 4.1V
0x8 = 4.3V
0x9 = 4.5V
0xA = 4.7V
0xB = 4.9V
0xC = 5.1V
0xD = 5.3V
0xE = 5.5V
0xF = 5.7V
0x10 = 5.9V
0x11 = 6.1V
0x12 = 6.3V
0x13 = 6.5V
0x14 = 6.7V
0x15 = 6.9V
0x16 = 7.1V
0x17 = 7.3V
0x18 = 7.5V
0x19 = 7.7V
0x1A = 7.9V
0x1B = 8.1V
0x1C = 8.3V
0x1D = 8.5V
0x1E = 8.7V
0x1F = 8.9V

9.12 MFR_SPECIFIC_D4 Register (Address = 0xD4) [Reset = 0x03]

MFR_SPECIFIC_D4 is shown in Table 9-14.

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Table 9-14 MFR_SPECIFIC_D4 Register Field Descriptions
BitFieldTypeResetDescription
7:5NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
4:0VDET_RISER/W0x3VDET rising threshold
0x0 = 2.8V
0x1 = 3V
0x2 = 3.2V
0x3 = 3.4V
0x4 = 3.6V
0x5 = 3.8V
0x6 = 4V
0x7 = 4.2V
0x8 = 4.4V
0x9 = 4.6V
0xA = 4.8V
0xB = 5V
0xC = 5.2V
0xD = 5.4V
0xE = 5.6V
0xF = 5.8V
0x10 = 6V
0x11 = 6.2V
0x12 = 6.4V
0x13 = 6.6V
0x14 = 6.8V
0x15 = 7V
0x16 = 7.2V
0x17 = 7.4V
0x18 = 7.6V
0x19 = 7.8V
0x1A = 8V
0x1B = 8.2V
0x1C = 8.4V
0x1D = 8.6V
0x1E = 8.8V
0x1F = 9V

9.13 MFR_SPECIFIC_D5 Register (Address = 0xD5) [Reset = 0x3F]

MFR_SPECIFIC_D5 is shown in Table 9-15.

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Table 9-15 MFR_SPECIFIC_D5 Register Field Descriptions
BitFieldTypeResetDescription
7:6NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
5:0V_OVP2R/W0x3FOVP2 threshold voltage
0x0 = 4.00V
0x1 = 4.500V
0x2 = 5.000V
0x3 = 5.500V
0x4 = 6.000V
0x5 = 6.500V
0x6 = 7.000V
0x7 = 7.500V
0x8 = 8.000V
0x9 = 8.500V
0xA = 9.000V
0xB = 9.500V
0xC = 10.000V
0xD = 10.500V
0xE = 11.000V
0xF = 11.500V
0x10 = 12.000V
0x11 = 12.500V
0x12 = 13.000V
0x13 = 13.500V
0x14 = 14.000V
0x15 = 14.500V
0x16 = 15.000V
0x17 = 15.500V
0x18 = 16.000V
0x19 = 17.000V
0x1A = 18.000V
0x1B = 19.000V
0x1C = 20.000V
0x1D = 21.000V
0x1E = 22.000V
0x1F = 23.000V
0x20 = 24.000V
0x21 = 25.000V
0x22 = 26.000V
0x23 = 27.000V
0x24 = 28.000V
0x25 = 29.000V
0x26 = 30.000V
0x27 = 31.000V
0x28 = 32.000V
0x29 = 33.000V
0x2A = 34.000V
0x2B = 35.000V
0x2C = 36.000V
0x2D = 37.000V
0x2E = 38.000V
0x2F = 39.000V
0x30 = 40.000V
0x31 = 41.000V
0x32 = 42.000V
0x33 = 43.000V
0x34 = 44.000V
0x35 = 45.000V
0x36 = 46.000V
0x37 = 47.000V
0x38 = 48.000V
0x39 = 49.000V
0x3A = 50.000V
0x3B = 51.000V
0x3C = 52.000V
0x3D = 53.000V
0x3E = 54.000V
0x3F = 55.000V

9.14 MFR_SPECIFIC_D6 Register (Address = 0xD6) [Reset = 0x15]

MFR_SPECIFIC_D6 is shown in Table 9-16.

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PS_Config0 Power stage Configuration

Table 9-16 MFR_SPECIFIC_D6 Register Field Descriptions
BitFieldTypeResetDescription
7:6CONFIG_SYNC_PINR/W0x0Selects the SYNC function to mainain paralell operation
0x0 = Input sync on rising edge
0x1 = Input sync on falling edge
0x2 = Sync output from internal rising edge
0x3 = Sync output from internal falling edge (180deg phase)
5EN_CONST_TDEADR/W0x0Forces a constant deadtime for the setting of SEL_MIN_DEADTIME_GDRV. Disables frequnecy dependency of min Tdead
0x0 = DISABLE
0x1 = ENABLE
4SEL_SCALE_DTR/W0x1Scales the gate driver dead time freq dependence and 2 MHz setpoint
0x0 = DISABLE
0x1 = ENABLE
3:2SEL_MIN_DEADTIME_GDRVR/W0x1Defines the minimum dead time at fsw = 2Mhz for the gate driver
0x0 = 10 ns (No delay)
0x1 = 20 ns
0x2 = 40 ns
0x3 = 60 ns
1:0BB_MIN_TIME_OFFSETR/W0x1Scales the BB min Ton or Toff time for the gate refresh
0x0 = 0.75 x
0x1 = 1 x
0x2 = 1.25 x
0x3 = 1.5 x

9.15 MFR_SPECIFIC_D7 Register (Address = 0xD7) [Reset = 0x36]

MFR_SPECIFIC_D7 is shown in Table 9-17.

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Table 9-17 MFR_SPECIFIC_D7 Register Field Descriptions
BitFieldTypeResetDescription
7:6NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
5:4SEL_INDUC_DERATER/W0x3Select the inductor de-rating for PSM mode to slope
0x0 = DISABLE
0x1 = 10%
0x2 = 20%
0x3 = 30%
3:0SEL_SLOPE_COMPR/W0x6Select slope comp current, as ratio of RT current
0x0 = 0.125
0x1 = 0.25
0x2 = 0.375
0x3 = 0.5
0x4 = 0.625
0x5 = 0.75
0x6 = 0.875
0x7 = 1
0x8 = 1.5
0x9 = 2
0xA = 2.5
0xB = 3
0xC = 3.5
0xD = 4
0xE = 4.5
0xF = 5

9.16 MFR_SPECIFIC_D8 Register (Address = 0xD8) [Reset = 0x84]

MFR_SPECIFIC_D8 is shown in Table 9-18.

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Table 9-18 MFR_SPECIFIC_D8 Register Field Descriptions
BitFieldTypeResetDescription
7SEL_FB_DIV20R/W0x1Select internal FB divider ratio of 20
0x0 = DIV10
0x1 = DIV20
6EN_CDCR/W0x0Enables the cable drop compensation
0x0 = DISABLE
0x1 = ENABLE
5:4CDC_GAINR/W0x0Selectes the Gain for the CDC voltage (1V) with respect to Vout
0x0 = 0.250V
0x1 = 0.500V
0x2 = 1.000V
0x3 = 2.000V
3:2SEL_DRV1_SEQR/W0x1Select the sequencing for the DRV 1 operation
0x0 = Pull-Low/ CP running if converter operation is off
0x1 = Pull-Low/ CP running if converter operation is on
0x2 = FORCE ACTIVE
0x3 = FORCE OFF
1:0SEL_DRV1_SUPR/W0x0Select the driver configuration for DRV1 pin
0x0 = Open Drain (active = pull low)
0x1 = Vout
0x2 = VBIAS
0x3 = VCC2 (Charge Pump driver)

9.17 MFR_SPECIFIC_D9 Register (Address = 0xD9) [Reset = 0x2C]

MFR_SPECIFIC_D9 is shown in Table 9-19.

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Table 9-19 MFR_SPECIFIC_D9 Register Field Descriptions
BitFieldTypeResetDescription
7:6NILR0x0This bit is not implemented in hardware. During write operations data for this bit is ignored. During read operations 0 is returned.
5SEL_ISET_PINR/W0x1Forces the ISET pin in I2C active config and disables the ILIM DAC.
0x0 = DISABLE
0x1 = ENABLE
4:0PCM_WINDOW_LOWR/W0xCSelect the lower voltage window threshold refered to VOUT for the PCM
0x0 = 0 (Disable)%
0x1 = 2.50%
0x2 = 5%
0x3 = 7.5%
0x4 = 10%
0x5 = 12.5%
0x6 = 15%
0x7 = 17.5%
0x8 = 20%
0x9 = 22.5%
0xA = 25%
0xB = 27.5%
0xC = 30%
0xD = 32.5%
0xE = 35%
0xF = 37.5%
0x10 = 40%
0x11 = 42.5%
0x12 = 45%
0x13 = 47.5%
0x14 = 50%
0x15 = 52.5%
0x16 = 55%
0x17 = 57.5%
0x18 = 60%
0x19 = 62.5%
0x1A = 65%
0x1B = 67.5%
0x1C = 70%
0x1D = 72.5%
0x1E = 75%
0x1F = 77.5%

9.18 IVP_VOLTAGE Register (Address = 0xDA) [Reset = 0xFF]

IVP_VOLTAGE is shown in Table 9-20.

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Table 9-20 IVP_VOLTAGE Register Field Descriptions
BitFieldTypeResetDescription
7:0V_IVPR/W0xFFInput Overvoltage Protection and Regulatoin Threshold
0x0 = 4.75V
0x1 = 4.875V
0x2 = 5.000V
0x3 = 5.125V
0x4 = 5.250V
0x5 = 5.375V
0x6 = 5.500V
0x7 = 5.625V
0x8 = 5.750V
0x9 = 5.875V
0xA = 6.000V
0xB = 6.125V
0xC = 6.250V
0xD = 6.375V
0xE = 6.500V
0xF = 6.625V
0x10 = 6.750V
0x11 = 6.875V
0x12 = 7.000V
0x13 = 7.125V
0x14 = 7.250V
0x15 = 7.375V
0x16 = 7.500V
0x17 = 7.625V
0x18 = 7.750V
0x19 = 7.875V
0x1A = 8.000V
0x1B = 8.125V
0x1C = 8.250V
0x1D = 8.375V
0x1E = 8.500V
0x1F = 8.625V
0x20 = 8.750V
0x21 = 8.875V
0x22 = 9.000V
0x23 = 9.125V
0x24 = 9.250V
0x25 = 9.375V
0x26 = 9.500V
0x27 = 9.625V
0x28 = 9.750V
0x29 = 9.875V
0x2A = 10.000V
0x2B = 10.125V
0x2C = 10.250V
0x2D = 10.375V
0x2E = 10.500V
0x2F = 10.625V
0x30 = 10.750V
0x31 = 10.875V
0x32 = 11.000V
0x33 = 11.125V
0x34 = 11.250V
0x35 = 11.375V
0x36 = 11.500V
0x37 = 11.625V
0x38 = 11.750V
0x39 = 11.875V
0x3A = 12.000V
0x3B = 12.125V
0x3C = 12.250V
0x3D = 12.375V
0x3E = 12.500V
0x3F = 12.625V
0x40 = 12.750V
0x41 = 12.875V
0x42 = 13.000V
0x43 = 13.125V
0x44 = 13.250V
0x45 = 13.375V
0x46 = 13.500V
0x47 = 13.625V
0x48 = 13.750V
0x49 = 13.875V
0x4A = 14.000V
0x4B = 14.125V
0x4C = 14.250V
0x4D = 14.375V
0x4E = 14.500V
0x4F = 14.625V
0x50 = 14.750V
0x51 = 14.875V
0x52 = 15.000V
0x53 = 15.125V
0x54 = 15.250V
0x55 = 15.375V
0x56 = 15.500V
0x57 = 15.625V
0x58 = 15.750V
0x59 = 15.875V
0x5A = 16.000V
0x5B = 16.125V
0x5C = 16.250V
0x5D = 16.375V
0x5E = 16.500V
0x5F = 16.625V
0x60 = 16.750V
0x61 = 16.875V
0x62 = 17.000V
0x63 = 17.125V
0x64 = 17.250V
0x65 = 17.375V
0x66 = 17.500V
0x67 = 17.625V
0x68 = 17.750V
0x69 = 17.875V
0x6A = 18.000V
0x6B = 18.125V
0x6C = 18.250V
0x6D = 18.375V
0x6E = 18.500V
0x6F = 18.625V
0x70 = 18.750V
0x71 = 18.875V
0x72 = 19.000V
0x73 = 19.125V
0x74 = 19.250V
0x75 = 19.375V
0x76 = 19.500V
0x77 = 19.625V
0x78 = 19.750V
0x79 = 19.875V
0x7A = 20.000V
0x7B = 20.125V
0x7C = 20.250V
0x7D = 20.375V
0x7E = 20.500V
0x7F = 20.625V
0x80 = 20.750V
0x81 = 20.875V
0x82 = 21.000V
0x83 = 21.125V
0x84 = 21.250V
0x85 = 21.375V
0x86 = 21.500V
0x87 = 21.625V
0x88 = 21.750V
0x89 = 21.875V
0x8A = 22.000V
0x8B = 22.125V
0x8C = 22.250V
0x8D = 22.375V
0x8E = 22.500V
0x8F = 22.625V
0x90 = 22.750V
0x91 = 22.875V
0x92 = 23.000V
0x93 = 23.125V
0x94 = 23.250V
0x95 = 23.500V
0x96 = 23.750V
0x97 = 24.000V
0x98 = 24.250V
0x99 = 24.500V
0x9A = 24.750V
0x9B = 25.000V
0x9C = 25.250V
0x9D = 25.500V
0x9E = 25.750V
0x9F = 26.000V
0xA0 = 26.250V
0xA1 = 26.500V
0xA2 = 26.750V
0xA3 = 27.000V
0xA4 = 27.250V
0xA5 = 27.500V
0xA6 = 27.750V
0xA7 = 28.000V
0xA8 = 28.250V
0xA9 = 28.500V
0xAA = 28.750V
0xAB = 29.000V
0xAC = 29.250V
0xAD = 29.500V
0xAE = 29.750V
0xAF = 30.000V
0xB0 = 30.250V
0xB1 = 30.500V
0xB2 = 30.750V
0xB3 = 31.000V
0xB4 = 31.250V
0xB5 = 31.500V
0xB6 = 31.750V
0xB7 = 32.000V
0xB8 = 32.250V
0xB9 = 32.500V
0xBA = 32.750V
0xBB = 33.000V
0xBC = 33.250V
0xBD = 33.500V
0xBE = 33.750V
0xBF = 34.000V
0xC0 = 34.250V
0xC1 = 34.500V
0xC2 = 34.750V
0xC3 = 35.000V
0xC4 = 35.250V
0xC5 = 35.500V
0xC6 = 35.750V
0xC7 = 36.000V
0xC8 = 36.250V
0xC9 = 36.500V
0xCA = 36.750V
0xCB = 37.000V
0xCC = 37.250V
0xCD = 37.500V
0xCE = 37.750V
0xCF = 38.000V
0xD0 = 38.250V
0xD1 = 38.500V
0xD2 = 38.750V
0xD3 = 39.000V
0xD4 = 39.250V
0xD5 = 39.500V
0xD6 = 39.750V
0xD7 = 40.000V
0xD8 = 40.250V
0xD9 = 40.500V
0xDA = 40.750V
0xDB = 41.000V
0xDC = 41.250V
0xDD = 41.500V
0xDE = 41.750V
0xDF = 42.000V
0xE0 = 42.250V
0xE1 = 42.500V
0xE2 = 42.750V
0xE3 = 43.000V
0xE4 = 43.250V
0xE5 = 43.500V
0xE6 = 43.750V
0xE7 = 44.000V
0xE8 = 44.250V
0xE9 = 44.500V
0xEA = 44.750V
0xEB = 45.000V
0xEC = 45.250V
0xED = 45.500V
0xEE = 45.750V
0xEF = 46.000V
0xF0 = 46.250V
0xF1 = 46.500V
0xF2 = 46.750V
0xF3 = 47.000V
0xF4 = 47.250V
0xF5 = 47.500V
0xF6 = 47.750V
0xF7 = 48.000V
0xF8 = 48.250V
0xF9 = 48.500V
0xFA = 48.750V
0xFB = 49.000V
0xFC = 49.250V
0xFD = 49.500V
0xFE = 49.750V
0xFF = 50.000V