JAJSTE0 March 2024 LMK05318B-Q1
PRODUCTION DATA
The APLL1 fractional N divider includes a 12-b integer portion (INT), a 40-b numerator portion (NUM), a fixed 40-b or programmable 24-b denominator portion (DEN), and a sigma-delta modulator. The INT and NUM are programmable, while the denominator is fixed to 240or programmable from 1 to 224 – 1 for the very high-frequency resolution on the VCO1 clock. The total APLL1 N divider value is: N = INT + NUM / DEN. Programmable denominator must be used in APLL mode only (DPLL powered down).
In APLL free-run mode, the PFD frequency and total N divider for APLL1 determine the VCO1 frequency, which can be computed by Equation 2.