SNOAA35D April   2023  – December 2023 LM2901 , LM2901B , LM2901B-Q1 , LM2903 , LM2903-Q1 , LM2903B , LM2903B-Q1 , LM339 , LM339-N , LM393 , LM393-N , LM393B , LM397 , TL331 , TL331-Q1 , TL331B

 

  1.   1
  2.   Application Design Guidelines for LM339, LM393, TL331 Family Comparators Including the New B-versions
  3.   Trademarks
  4. Devices Covered in Application Note
    1. 1.1 Base Part Numbers
    2. 1.2 Input Voltage Offset Grades
    3. 1.3 Maximum Supply Voltage
    4. 1.4 High Reliability Options
  5. The New TL331B, TL391B, LM339B, LM393B, LM2901B and LM2903B B Versions
    1. 2.1 PCN to Change Classic Die to a New Die Design
      1. 2.1.1 Determine Die Used for Single TL331 and Dual LM293, LM393, and LM2903
      2. 2.1.2 Determine Die Used for Quad LM139, LM239, LM339, and LM2901
      3. 2.1.3 Device PCN Summary
    2. 2.2 Changes to Package Top Markings
  6. Input Considerations
    1. 3.1  Input Stage Schematic – The Classic LM339 Family
    2. 3.2  Input Stage Schematic - New B Devices
    3. 3.3  Differences Between the Classic and B Die Devices
    4. 3.4  Input Voltage Range
    5. 3.5  Input Voltage Range vs. Common Mode Voltage Range
    6. 3.6  Reason for Input Range Headroom Limitation
    7. 3.7  Input Voltage Range Feature
      1. 3.7.1 Both Inputs Above Input Range Behavior
    8. 3.8  Negative Input Voltages
      1. 3.8.1 Maximum Input Current
      2. 3.8.2 Phase Reversal or Inversion
      3. 3.8.3 Protecting Inputs from Negative Voltages
        1. 3.8.3.1 Simple Resistor and Diode Clamp
        2. 3.8.3.2 Voltage Divider with Clamp
          1. 3.8.3.2.1 Split Voltage Divider with Clamp
    9. 3.9  Power-Up Behavior
    10. 3.10 Capacitors and Hysteresis
    11. 3.11 Output to Input Cross-Talk
  7. Output Stage Considerations
    1. 4.1 Output VOL and IOL
    2. 4.2 Pull-Up Resistor Selection
    3. 4.3 Short Circuit Sinking Current
    4. 4.4 Pulling Output Up Above VCC
    5. 4.5 Negative Voltages Applied to Output
    6. 4.6 Adding Large Filter Capacitors To Output
  8. Power Supply Considerations
    1. 5.1 Supply Bypassing
      1. 5.1.1 Low VCC Guidance
      2. 5.1.2 Split Supply use
  9. General Comparator Usage
    1. 6.1 Unused Comparator Connections
      1. 6.1.1 Do Not Connect Inputs Directly to Ground
      2. 6.1.2 Unused Comparator Input Connections
      3. 6.1.3 Leave Outputs Floating
      4. 6.1.4 Prototyping
  10. PSPICE and TINA TI Models
  11. Conclusion
  12. Related Documentation
    1. 9.1 Related Links
  13. 10Revision History

Unused Comparator Input Connections

Occasionally applications will not need all the comparators in a dual or quad package. The unused channels must be connected in a way that is safe for the unused comparator and doesn’t affect the used comparators. The best connection method puts the comparator into the normal operation range and no inputs are connected directly to low impedance nodes. The output of the comparator must be left open and not connected.

GUID-BCFD713D-FB69-4199-A411-C9D1C6FCCD22-low.gif Figure 6-1 Best Connections Practices for Single and Dual Supplies

Increasing the input resistor to 10 MΩ would ensure linear operation as the input bias current (Ib), which flows out of the input pin towards ground, would raise the non-inverting input voltage beyond the input offset voltage range. VOL Full VID is better suited for lower voltage applications as there is no reason to apply a large input voltage difference even though the comparator allows it. The VOL (IIB Biased) method uses the input bias current to raise the voltage on the inverting input. If used, place the 10-MΩ resistor close to the inverting input pin to reduce noise pickup. No inputs may be connected directly to low impedance nodes such as ground, VCC or VEE. VOH alternatives are also acceptable; just swap the input pins.

The next set of connections in Figure 6-2 is not recommended, but these configurations are not considered harmful methods of terminating unused channels. The VOH alternatives that swap the inputs are also not recommended methods of terminating unused channels.

GUID-58482BD0-87A3-40F3-A1DD-2EF43369A626-low.gif Figure 6-2 Less Than Acceptable Connection Practices for Single and Dual Supplies

The last set of connections, shown in Figure 6-3, demonstrates improper setups that could cause output noise chatter or device damage if the GND pin were to ever become positive relative to the input pin.

GUID-467F677D-4BD3-4F8A-8122-C81E42E4FC44-low.gif Figure 6-3 Potentially Harmful Connection Practices for Single and Dual Supplies