SPRUJ86B October   2023  – May 2024 AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
      1.      Preface: Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Device Information
      1. 1.3.1 HSEC 180-pin Control Card Docking Station
      2. 1.3.2 Security
  6. 2Hardware
    1. 2.1  Component Identification
    2. 2.2  Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
      4. 2.2.4 Power Sequence
      5. 2.2.5 PMIC
    3. 2.3  Functional Block Diagram
    4. 2.4  Reset
    5. 2.5  Clock
    6. 2.6  Boot Mode Selection
    7. 2.7  JTAG Path Selection
    8. 2.8  Header Information
    9. 2.9  GPIO Mapping
    10. 2.10 Push Buttons
    11. 2.11 Interfaces
      1. 2.11.1  Memory Interface
        1. 2.11.1.1 OSPI/QSPI
        2. 2.11.1.2 Board ID EEPROM
      2. 2.11.2  Ethernet Interface
        1. 2.11.2.1 Control Card Ethernet Routing
        2. 2.11.2.2 On Board Ethernet PHY
        3. 2.11.2.3 LED Indication in RJ45 Connector
      3. 2.11.3  I2C
      4. 2.11.4  Industrial Application LEDs
      5. 2.11.5  SPI
      6. 2.11.6  UART
      7. 2.11.7  MCAN
      8. 2.11.8  FSI
      9. 2.11.9  JTAG
      10. 2.11.10 Test Automation Header
      11. 2.11.11 LIN
      12. 2.11.12 MMC
      13. 2.11.13 ADC and DAC
    12. 2.12 HSEC Pinout and Pinmux Mapping
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 If You Need Assistance
    2. 4.2 Trademarks
  9. 5Related Documentation
    1. 5.1 Supplemental Content
      1.      5.1.A E1 Board Modifications
      2.      5.1.B E2 Design Changes
  10. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  11. 7Revision History
  12. 8Revision History

2.5 Clock

The AM263Px SoC requires a 25MHz clock input for XTAL_XI. All reference clocks required for the SoC and the three Ethernet PHY's are generated from a single four output clock buffer (LMK1C1103PWR), which is sourced from a single 25MHz LVCMOS Oscillator by default. A clock buffer is used for level translation from 3.3V to 1.8V.

The Control Card also requires a 16MHz clock source for the TM4C129 microcontroller for UART-USB JTAG support.

AM263P1, AM263P1-Q1, AM263P2, AM263P2-Q1, AM263P4, AM263P4-Q1 Oscillator Clock Tree Figure 2-13 Oscillator Clock Tree

Alternatively, the SoC clock input can be sourced from a single 25MHz crystal. To use the crystal there must be resistors mounted and unmounted. When the crystal is used as a clock source then the AM263Px CLKOUT0 signal is used to source the four output clock buffer for the Ethernet PHY reference clock signals.

AM263P1, AM263P1-Q1, AM263P2, AM263P2-Q1, AM263P4, AM263P4-Q1 Crystal Clock Tree Figure 2-14 Crystal Clock Tree

The following table describes the proper resistors to be mounted and DNI'd for each clock source configuration.

Table 2-3 Clock Source
Clock Source Mounted DNI
25MHz LVCMOS Oscillator (default) R273, R176 R178, R179, R271
25MHz Crystal R178, R179, R271 R273, R176