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Overview for Little Logic

Little logic gates have all the features of their bigger cousins but in single, double, and triple gate functions. They cover the full range of voltages from 0.8V to 5.5V. They come in tiny packages making them excellent for handheld and any other equipment where space is a concern.

TI's new DPW package is a tiny 0.8 mm square that retains the traditional 0.5 mm pad pitch, easing your space constrained design. The LVC family of logic devices in now available in the DPW package.

LVC Little Logic

1.45 x 1.0 x 0.6 [mm]
Pitch 0.5 [mm]

1.4 x 0.9 x 0.5 [mm]
Pitch 0.5 [mm]

1.2 x 0.8 x 0.5 [mm]
Pitch 0.4 [mm]

0.8 x 0.8 x 0.37 [mm]
Pitch 0.5 [mm]

Families Voltages Description
AUC 0.8 – 2.7 Advanced LV CMOS (highest speed) (tpd <=3.4ns)              
AHC 2.0 – 5.5 Advanced HCMOS              
LVC 1.65 – 5.5 LV CMOS (high drive) (IOH/IOL= -24/24mA)          
AUP 0.8 – 3.6 Advanced LP CMOS (Lowest power) (Icc <= 0.9uA)