DLPC3433 (ACTIVE) DLP® Display Controller for DLP3010 (0.3 720p) DMD

• Display Controller for DLP3010 (.3 720p) TRP DMD
  • Supports input image sizes up to 720p
  • Low-power DMD interface with interface training
• 24-Bit, input pixel interface support:
  • Parallel or BT656, interface protocols
  • Pixel clock up to 150 MHz
  • Multiple input pixel data format options
• MIPI DSI interface type 3 (supported only with DLPC3433)
  • One to four lanes, up to 470 Mbps lane speed
• Pixel data processing:
  • IntelliBright™ suite of image processing algorithms
    • Content adaptive illumination control
    • Local area brightness boost
  • Image resizing (scaling)
  • 1D keystone correction
  • Color coordinate adjustment
  • Programmable degamma
  • Active power management processing
  • Color space conversion
  • 4:2:2 to 4:4:4 chroma interpolation
  • Field scaled de-interlacing
• Two package options:
  • 176-Pin, 7- × 7-mm, 0.4-mm Pitch, NFBGA
  • 201-Pin, 13- × 13-mm, 0.8-mm Pitch, NFBGA
• External flash support
• Auto DMD parking at power down
• Embedded frame memory (eDRAM)
• System features:
  • I²C control of device configuration
  • Programmable splash screens
  • Programmable LED current control
  • Display image rotation
  • One frame latency
  • Compatible with DLPA2000, DLPA2005, and DLPA3000 PMIC’s

All trademarks are the property of their respective owners.