TPS51200

Name: TPS51200
Brand: TI
SKU: TPS51200
Price: 0.255 USD

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Senken-/Quell-DDR-Abschlussregler für 3 A mit gepufferter VTTREF-Referenz für DDR2, DDR3, DDR3L und

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Datenblatt

document-pdfAcrobat TPS51200 Sink and Source DDR Termination Regulator datasheet (Rev. D) (Englisch) PDF | HTML

TPS51200

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Datenblatt

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Produktdetails

Vin (min) (V)

1.1

Vin (max) (V)

3.5

Vout (max) (V)

1.8

Features

S3/S5 Support

Iq (typ) (mA)

0.5

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Product type

DDR

DDR memory type

DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3

Vin (min) (V)

1.1

Vin (max) (V)

3.5

Vout (max) (V)

1.8

Features

S3/S5 Support

Iq (typ) (mA)

0.5

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Product type

DDR

DDR memory type

DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3

VSON (DRC)

9 mm² 3 x 3

Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
VLDOIN Voltage Range: 1.1 V to 3.5 V
Sink and Source Termination Regulator Includes Droop Compensation
Requires Minimum Output Capacitance of 20-µF (Typically 3 × 10-µF MLCCs) for Memory Termination Applications (DDR)
PGOOD to Monitor Output Regulation
EN Input
REFIN Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
Remote Sensing (VOSNS)
±10-mA Buffered Reference (REFOUT)
Built-in Soft Start, UVLO, and OCL
Thermal Shutdown
Supports DDR, DDR2, DDR3, DDR3L, Low-Power DDR3, and DDR4 VTT Applications
10-Pin VSON Package With Thermal Pad

Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
VLDOIN Voltage Range: 1.1 V to 3.5 V
Sink and Source Termination Regulator Includes Droop Compensation
Requires Minimum Output Capacitance of 20-µF (Typically 3 × 10-µF MLCCs) for Memory Termination Applications (DDR)
PGOOD to Monitor Output Regulation
EN Input
REFIN Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
Remote Sensing (VOSNS)
±10-mA Buffered Reference (REFOUT)
Built-in Soft Start, UVLO, and OCL
Thermal Shutdown
Supports DDR, DDR2, DDR3, DDR3L, Low-Power DDR3, and DDR4 VTT Applications
10-Pin VSON Package With Thermal Pad

The TPS51200 device is a sink and source double data rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.

The TPS51200 maintains a fast transient response and requires a minimum output capacitance of only 20 µF. The TPS51200 supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low-Power DDR3 and DDR4 VTT bus termination.

In addition, the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

The TPS51200 is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –40°C to +85°C.

The TPS51200 device is a sink and source double data rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.

In addition, the TPS51200 provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

The TPS51200 is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –40°C to +85°C.

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Alle anzeigen 23

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	Selection guide	Power Management Guide 2018 (Rev. R)		25 Jun 2018
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	More literature	Computing DDR DC-DC Power Solutions		22 Aug 2012
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	Application note	Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOs		28 Apr 2010
	Application note	Power Two Xilinx(TM) LX240 Virtex-6(TM) Devices		20 Apr 2010
	Application note	Power Ref Design for TMS320C6472 5Vin DC/DC Converters (1x C6472)		31 Mär 2010
	Application note	'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472)		26 Mär 2010
	Application note	Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs		26 Mär 2010
	Application note	TMS320C6472 5V Input Pwr Design, Integrated FET DC/DC Converters and Controllers		26 Mär 2010
	White paper	Spartan 6 LX150T Modular Solution		14 Okt 2009
	User guide	Virtex 6 LX130T Module design		27 Aug 2009
	EVM User's guide	Using the TPS51200 Evaluation Module		28 Mai 2008

Design und Entwicklung

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Evaluierungsplatine

TPS51200EVM — TPS51200 DDR-Terminierungsregler mit Sinkquelle

Die TPS51200EVM-Evaluierungsplatine HPA322A dient zur Evaluierung der Leistung und der Eigenschaften des kostenoptimierten VTT-Terminierungsreglers TPS51200 für DDR/DDR2/DDR3/LP DDR3 von TI. Der TPS51200 ist für die Bereitstellung der richtigen Terminierungsspannung und einer gepufferten (...)

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