TPS6593-Q1

AKTIV

2,8-V- bis 5,5-V-PMIC mit 5 Abwärtswandlern und 4 LDOs für die Automobilindustrie

Produktdetails

Regulated outputs (#) 9 Configurability User programmable Vin (min) (V) 2.8 Vin (max) (V) 5.5 Vout (min) (V) 0.3 Vout (max) (V) 3.3 Iout (max) (A) 14 Features Adaptive/dynamic voltage scaling, Comm control, Dynamic voltage scaling, I2C control, Multiple outputs, Output discharge, Overcurrent protection, Power good, Power sequencing, SPI control, Soft-start adjustable TI functional safety category Functional Safety-Compliant Step-up DC/DC converter 0 Step-down DC/DC converter 5 Step-down DC/DC controller 0 Step-up DC/DC controller 0 LDO 4 Iq (typ) (mA) 0.002 Rating Automotive Switching frequency (max) (kHz) 2400 Operating temperature range (°C) -40 to 125 Processor supplier Generic Processor name Generic Shutdown current (ISD) (typ) (µA) 2 Switching frequency (typ) (kHz) 2200 Product type Processor and FPGA
Regulated outputs (#) 9 Configurability User programmable Vin (min) (V) 2.8 Vin (max) (V) 5.5 Vout (min) (V) 0.3 Vout (max) (V) 3.3 Iout (max) (A) 14 Features Adaptive/dynamic voltage scaling, Comm control, Dynamic voltage scaling, I2C control, Multiple outputs, Output discharge, Overcurrent protection, Power good, Power sequencing, SPI control, Soft-start adjustable TI functional safety category Functional Safety-Compliant Step-up DC/DC converter 0 Step-down DC/DC converter 5 Step-down DC/DC controller 0 Step-up DC/DC controller 0 LDO 4 Iq (typ) (mA) 0.002 Rating Automotive Switching frequency (max) (kHz) 2400 Operating temperature range (°C) -40 to 125 Processor supplier Generic Processor name Generic Shutdown current (ISD) (typ) (µA) 2 Switching frequency (typ) (kHz) 2200 Product type Processor and FPGA
VQFNP (RWE) 56 64 mm² 8 x 8
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device operates from 3 V to 5.5 V input supply
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM classification level 2
    • Device CDM classification level C4A
  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation to aid ISO26262 and IEC61508 system design available upon product release
    • Systematic capability up to ASIL-D and SIL-3
    • Hardware integrity up to ASIL-B and SIL-2
    • Input supply voltage monitor
    • Under/overvoltage monitors and over-current monitors on all output supply rails
    • Watchdog with selectable trigger / Q&A mode
    • Two error signal monitors (ESMs) with selectable level / PWM mode
    • Thermal monitoring with high temperature warning and thermal shutdown
    • Bit-integrity (CRC) error detection on internal configuration registers and non-volatile memory (NVM)
  • Low-power consumption
    • 2 µA typical shutdown current
    • 7 µA typical in back up supply only mode
    • 20 µA typical in low power standby mode
  • Five step-down switched-mode power supply (BUCK) regulators:
    • 0.3 V to 3.34 V output voltage range in 5, 10, or 20-mV steps
    • One with 4 A, three with 3.5 A, and one with 2 A output current capability
    • Flexible multi-phase capability for four BUCKs: up to 14 A output current from a single rail
    • Short-circuit and over-current protection
    • Internal soft-start for in-rush current limitation
    • 2.2 MHz / 4.4 MHz switching frequency
    • Ability to synchronize to external clock input
  • Three low-dropout (LDO) linear regulators with configurable bypass mode
    • 0.6 V to 3.3 V output voltage range with 50-mV steps in linear regulation mode
    • 1.7 V to 3.3 V output voltage range in bypass mode
    • 500 mA output current capability with short-circuit and over-current protection
  • One low-dropout (LDO) linear regulator with low-noise performance
    • 1.2 V to 3.3 V output voltage range in 25-mV steps
    • 300 mA output current capability with short-circuit and over-current protection
  • Configurable power sequence control in non-volatile memory (NVM):
    • Configurable power-up and power-down sequences between power states
    • Digital output signals can be included in the power sequences
    • Digital input signals can be used to trigger power sequence transitions
    • Configurable handling of safety-relevant errors
  • 32-kHz crystal oscillator with option to output a buffered 32-kHz clock output
  • Real-time clock (RTC) with alarm and periodic wake-up mechanism
  • One SPI or two I 2C control interfaces , with second I 2C interface dedicated for Q&A watchdog communication
  • Package option:
    • 8-mm × 8-mm 56-pin VQFNP with 0.5-mm pitch
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device operates from 3 V to 5.5 V input supply
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM classification level 2
    • Device CDM classification level C4A
  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation to aid ISO26262 and IEC61508 system design available upon product release
    • Systematic capability up to ASIL-D and SIL-3
    • Hardware integrity up to ASIL-B and SIL-2
    • Input supply voltage monitor
    • Under/overvoltage monitors and over-current monitors on all output supply rails
    • Watchdog with selectable trigger / Q&A mode
    • Two error signal monitors (ESMs) with selectable level / PWM mode
    • Thermal monitoring with high temperature warning and thermal shutdown
    • Bit-integrity (CRC) error detection on internal configuration registers and non-volatile memory (NVM)
  • Low-power consumption
    • 2 µA typical shutdown current
    • 7 µA typical in back up supply only mode
    • 20 µA typical in low power standby mode
  • Five step-down switched-mode power supply (BUCK) regulators:
    • 0.3 V to 3.34 V output voltage range in 5, 10, or 20-mV steps
    • One with 4 A, three with 3.5 A, and one with 2 A output current capability
    • Flexible multi-phase capability for four BUCKs: up to 14 A output current from a single rail
    • Short-circuit and over-current protection
    • Internal soft-start for in-rush current limitation
    • 2.2 MHz / 4.4 MHz switching frequency
    • Ability to synchronize to external clock input
  • Three low-dropout (LDO) linear regulators with configurable bypass mode
    • 0.6 V to 3.3 V output voltage range with 50-mV steps in linear regulation mode
    • 1.7 V to 3.3 V output voltage range in bypass mode
    • 500 mA output current capability with short-circuit and over-current protection
  • One low-dropout (LDO) linear regulator with low-noise performance
    • 1.2 V to 3.3 V output voltage range in 25-mV steps
    • 300 mA output current capability with short-circuit and over-current protection
  • Configurable power sequence control in non-volatile memory (NVM):
    • Configurable power-up and power-down sequences between power states
    • Digital output signals can be included in the power sequences
    • Digital input signals can be used to trigger power sequence transitions
    • Configurable handling of safety-relevant errors
  • 32-kHz crystal oscillator with option to output a buffered 32-kHz clock output
  • Real-time clock (RTC) with alarm and periodic wake-up mechanism
  • One SPI or two I 2C control interfaces , with second I 2C interface dedicated for Q&A watchdog communication
  • Package option:
    • 8-mm × 8-mm 56-pin VQFNP with 0.5-mm pitch

The TPS6593-Q1 device provides four flexible multi-phase configurable BUCK regulators with 3.5 A output current per phase, and one additional BUCK regulator with 2 A output current.

All of the BUCK regulators can be synchronized to an internal 2.2-MHz or 4.4-MHz or an external 1-MHz, 2-MHz, or 4-MHz clock signal. To improve the EMC performance, an integrated spread-spectrum modulation can be added to the synchronized BUCK switching clock signal. This clock signal can also be made available to external devices through a GPIO output pin. The device provides four LDOs: three with 500-mA capability, which can be configured as load switches; one with 300-mA capability and low-noise performance.

Non-volatile memory (NVM) is used to control the default power sequences and default configurations, such as output voltage and GPIO configurations. The NVM is pre-programmed to allow start-up without external programming. Most static configurations, stored in the register map of the device, can be changed from the default through SPI or I 2C interfaces to configure the device to meet many different system needs. The NVM contains a bit-integrity-error detection feature (CRC) to stop the power-up sequence if an error is detected, preventing the system from starting in an unknown state.

The TPS6593-Q1 includes a 32-kHz crystal oscillator, which generates an accurate 32-kHz clock for the integrated RTC module. A backup-battery management provides power to the crystal oscillator and the real-time clock (RTC) module from a coin cell battery or a super-cap in the event of power loss from the main supply.

The TPS6593-Q1 device includes protection and diagnostic mechanisms such as voltage monitoring on the input supply, voltage monitoring on all BUCK and LDO regulator outputs, register and interface CRC, current-limit, short-circuit protection, thermal pre-warning, and over-temperature shutdown. The device also includes a Q&A or trigger mode watchdog to monitor for MCU software lockup, and two error signal monitor (ESM) inputs with fault injection options to monitor the error signals from the attached SoC or MCU. The TPS6593-Q1 can notify the processor of these events through the interrupt handler, allowing the MCU to take action in response.

The TPS6593-Q1 device provides four flexible multi-phase configurable BUCK regulators with 3.5 A output current per phase, and one additional BUCK regulator with 2 A output current.

All of the BUCK regulators can be synchronized to an internal 2.2-MHz or 4.4-MHz or an external 1-MHz, 2-MHz, or 4-MHz clock signal. To improve the EMC performance, an integrated spread-spectrum modulation can be added to the synchronized BUCK switching clock signal. This clock signal can also be made available to external devices through a GPIO output pin. The device provides four LDOs: three with 500-mA capability, which can be configured as load switches; one with 300-mA capability and low-noise performance.

Non-volatile memory (NVM) is used to control the default power sequences and default configurations, such as output voltage and GPIO configurations. The NVM is pre-programmed to allow start-up without external programming. Most static configurations, stored in the register map of the device, can be changed from the default through SPI or I 2C interfaces to configure the device to meet many different system needs. The NVM contains a bit-integrity-error detection feature (CRC) to stop the power-up sequence if an error is detected, preventing the system from starting in an unknown state.

The TPS6593-Q1 includes a 32-kHz crystal oscillator, which generates an accurate 32-kHz clock for the integrated RTC module. A backup-battery management provides power to the crystal oscillator and the real-time clock (RTC) module from a coin cell battery or a super-cap in the event of power loss from the main supply.

The TPS6593-Q1 device includes protection and diagnostic mechanisms such as voltage monitoring on the input supply, voltage monitoring on all BUCK and LDO regulator outputs, register and interface CRC, current-limit, short-circuit protection, thermal pre-warning, and over-temperature shutdown. The device also includes a Q&A or trigger mode watchdog to monitor for MCU software lockup, and two error signal monitor (ESM) inputs with fault injection options to monitor the error signals from the attached SoC or MCU. The TPS6593-Q1 can notify the processor of these events through the interrupt handler, allowing the MCU to take action in response.

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Information

Hinweis

Der endgültige Serienbaustein ist mit ASIL-B/SIL-2 Functional Safety-Compliance geplant

  • Dokumentation zur Unterstützung der Konformität mit ISO26262 und IEC61508
  • Systematische Fähigkeiten bis ASIL-D und SIL-3 geplant
  • Hardware-Integrität bis hin zu ASIL-B und SIL-2 geplant

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Technische Dokumentation

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Technical article Four power supply challenges in ADAS front camera designs PDF | HTML 05 Jan 2024
Product overview PMIC Solution for AM62A PDF | HTML 31 Aug 2023
User guide TPS65931211-Q1 PMIC User Guide for AM62A PDF | HTML 27 Jul 2023
Certificate TPS6593EVM EU Declaration of Conformity (DoC) (Rev. A) 02 Mai 2023
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Design und Entwicklung

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Simulationsmodell

TPS6594-Q1 PSpice Transient Model (Rev. B)

SLVMDJ8B.ZIP (241 KB) - PSpice Model
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VQFNP (RWE) 56 Optionen anzeigen

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