DRDY is an output. When it transitions low, new conversion data are ready. The CS signal has no effect on the data ready signal. The behavior of DRDY is determined by whether the device is in RDATAC mode or the RDATA command is being used to read data on demand. (See the RDATAC: Read Data Continuous and RDATA: Read Data subsections of the SPI Command Definitions section for further details).
When reading data with the RDATA command, the read operation can overlap the occurrence of the next DRDY without data corruption.
The START pin or the START command is used to place the device either in normal data capture mode or pulse data capture mode.
Figure 46 shows the relationship between DRDY, DOUT, and SCLK during data retrieval (in case of an ADS1291, ADS1292, and ADS1292R with a selected data rate that gives 24-bit resolution). DOUT is latched out at the SCLK rising edge. DRDY is pulled high at the SCLK falling edge. Note that DRDY goes high on the first SCLK falling edge regardless of the status of CS and regardless of whether data are being retrieved from the device or a command is being sent through the DIN pin.