Before device power-up, all digital and analog inputs must be low. At the time of power-up, all of these signals should remain low until the power supplies have stabilized, as shown in Figure 72. At this time, begin supplying the master clock signal to the CLK pin. Wait for time tPOR, then transmit a RESET pulse. After releasing RESET, the configuration register must be programmed, see the CONFIG1: Configuration Register 1 subsection of the Register Map section for details. The power-up sequence timing is shown in Table 29.
|tPOR||Wait after power-up until reset||212||tMOD|
|tRST||Reset low width||1||tMOD|