SLUSFQ0C November   2024  – September 2025 BQ27Z758

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configurations and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
      1. 5.5.1 Supply Current
      2. 5.5.2 Common Analog (LDO, LFO, HFO, REF1, REF2, I-WAKE)
      3. 5.5.3 Battery Protection (CHG, DSG)
      4. 5.5.4 Cell Sensing Output (BAT_SP, BAT_SN)
      5. 5.5.5 Gauge Measurements (ADC, CC, Temperature)
      6. 5.5.6 Flash Memory
    6. 5.6 Digital I/O: DC Characteristics
    7. 5.7 Digital I/O: Timing Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  BQ27Z758 Processor
      2. 6.3.2  Battery Parameter Measurements
        1. 6.3.2.1 Coulomb Counter (CC) and Digital Filter
        2. 6.3.2.2 ADC Multiplexer
        3. 6.3.2.3 Analog-to-Digital Converter (ADC)
        4. 6.3.2.4 Internal Temperature Sensor
        5. 6.3.2.5 External Temperature Sensor Support
      3. 6.3.3  Power Supply Control
      4. 6.3.4  ENAB Pin
      5. 6.3.5  Bus Communication Interface
      6. 6.3.6  Low Frequency Oscillator
      7. 6.3.7  High Frequency Oscillator
      8. 6.3.8  1.8V Low Dropout Regulator
      9. 6.3.9  Internal Voltage References
      10. 6.3.10 Overcurrent in Discharge Protection
      11. 6.3.11 Overcurrent in Charge Protection
      12. 6.3.12 Short-Circuit Current in Discharge Protection
      13. 6.3.13 Primary Protection Features
      14. 6.3.14 Battery Sensing
      15. 6.3.15 Gas Gauging
      16. 6.3.16 Zero Volt Charging (ZVCHG)
      17. 6.3.17 Charge Control Features
      18. 6.3.18 Authentication
    4. 6.4 Device Functional Modes
      1. 6.4.1 Lifetime Logging Features
      2. 6.4.2 Configuration
        1. 6.4.2.1 Coulomb Counting
        2. 6.4.2.2 Cell Voltage Measurements
        3. 6.4.2.3 Auto Calibration
        4. 6.4.2.4 Temperature Measurements
  8. Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements (Default)
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Changing Design Parameters
      3. 7.2.3 Calibration Process
      4. 7.2.4 Gauging Data Updates
        1. 7.2.4.1 Application Curve
      5. 7.2.5 ESD Mitigation
    3. 7.3 Power Supply Requirements
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Orderable, and Packaging Information
    1.     PACKAGE OPTION ADDENDUM
    2. 10.1 Tape and Reel Information
    3. 10.2 Mechanical Data

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YAH|15
Thermal pad, mechanical data (Package|Pins)

Cell Sensing Output (BAT_SP, BAT_SN)

Unless otherwise noted, characteristics noted under conditions of TA = –40 to 85℃
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
STATIC RESPONSE
VBUFACCBuffer accuracy
(BAT_SP – BAT_SN)
VBAT at 1500mV and 2400mV DC, PACK-BAT_SP ≥ 200mV, BAT_SP load: Hi-Z to 1kΩ, BAT_SN load: 1kΩ to 10kΩ145015001550mV
235024002450
VBUFOFFSBAT_SN common mode shift
(BAT_SN – VSS)
400mV option, VBAT = 1.5V to 2.5V370400430mV
200mV option, VBAT = 2.0V to 2.5V170200230
0mV option, VBAT = 2.0V to 2.5V–30030
600mV option, VBAT = 2.0 to 2.5V550600650
ΔVBUF_LINEBuffer line regulationVBAT = 1.5 to 2.5V, no load, BAT_SP – BAT_SN, VPACK – VBAT = 1.0V10mV
ΔVBUF_LOADBuffer load regulationVBAT = 2.4V, load = 1mA, BAT_SP – BAT_SN, VPACK - VBAT = 1.0V1.2mV
VRLOACCRLO mode accuracy
(BAT_SP – BAT_SN)
VBAT = 3000mV to 5000mV DC, For stability, 0mV buffer option enabled, BAT_SP load: Hi-Z to 1kΩ, BAT_SN load: 1kΩ to 10kΩ–7+7mV
VRLOACCPRLO mode accuracy
(BAT_SP – VSS)
–5+5
VRLOACCNRLO mode accuracy
(BAT_SN – VSS)
–5+5
RLO_SPBAT_SP low resistance mode200Ω option, DSG FET = ON160200260
510Ω option, DSG FET = ON459510561
RLO_SNBAT_SN low resistance mode200Ω option, DSG FET = ON160200260
510Ω option, DSG FET = ON459510561
RHIZ_SPBAT_SP high impedance modeCHG FET = OFF0.61.01.3MΩ
RHIZ_SNBAT_SN high impedance mode0.61.01.3
tBUF_OFFBuffer turn-off timing (1)Buffer disable timing respect to DSG FET turn-on500us
CBUF_SPMax external capacitance for stable operation (1)BAT_SP to SRN (PACK–)150pF
CBUF_SNBAT_SN to SRN (PACK–)150
BBUF_BWBuffer unity gain bandwidth (1)Buffer enabled30kHz
VBCPBAT_SP – BAT +Fault (BCP) Threshold Range(1)

Recommended threshold range.
Factory trimmed in ≈2mV steps

+100+250mV

Factory default trimmed threshold(3)

+200
VBCP_ACCBAT_SP – BAT +Fault Accuracy (3)RLO mode enabled,
Step size 10mV
–10+10
VBDPBAT_SP – BAT –Fault (BDP) Threshold Range(1)Recommended threshold range.
Factory trimmed in ≈2mV steps
–250–100mV
Factory default trimmed threshold(3)–200
VBDP_ACCBAT_SP – BAT –Fault Accuracy (3)RLO mode enabled,
Step size 10mV
–10+10
VBCNBAT_SN – VSS +Fault (BCN) Threshold Range(1)Recommended threshold range.
Factory trimmed in ≈2mV steps
+100+250mV
Factory default trimmed threshold(3)+200
VBCN_ACCBAT_SN – VSS +Fault Accuracy (3)RLO mode enabled,
Step size 10mV
–10+10
VBDNBAT_SN – VSS –Fault (BDN) Threshold Range(1)Recommended threshold range.
Factory trimmed in ≈2mV steps
–250–100mV
Factory default trimmed threshold(3)–200
VBDN_ACCBAT_SN – VSS –Fault Accuracy (3)RLO mode enabled,
Step size 10mV
–10+10
tLO_FAULT_DLYBAT_SP / BAT_SN
fault comparator delay(1)
8ms delay8ms
100ms delay100ms
tLO_FAULT_STRTBAT_SP / BAT_SN
fault restart time (1)(2)
1000ms
TRANSIENT RESPONSE
VLOAD_SPBAT_SP load transient (1)No load ≥ 1KΩ ≥ No load,
Transition time 1μs
–300300mV
VLOAD_SNBAT_SN load transient (1)–200200mV
VLINE_SNBAT_SN line transient (1)VBAT = 1.5V ≥ 2.4V ≥ 1.5V,
Transition slope 500mV / 10us
–3030mV
VTRANS(BAT_SP – BAT_SN)
transition transient (1)
Firmware commanded transition from BUF mode to RLO mode–70050mV
Specified by Design. Not production tested.
Firmware-based parameter. Not production tested.
Accuracy assured by factory trim at specified default threshold. A change from the default threshold requires device calibration in the field. Refer to the BQ27Z746R1 and BQ27Z758 Technical Reference Manual.