SWRS272C april   2023  – june 2023 CC2340R5

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Revision History
  7. Device Comparison
  8. Pin Configuration and Functions
    1. 7.1 Pin Diagram – RKP Package (Top View)
    2. 7.2 Signal Descriptions – RKP Package
    3. 7.3 Connections for Unused Pins and Modules – RKP Package
    4. 7.4 Pin Diagram – RGE Package (Top View)
    5. 7.5 Signal Descriptions – RGE Package
    6. 7.6 Connections for Unused Pins and Modules – RGE Package
    7. 7.7 RKP and RGE Peripheral Pin Mapping
    8. 7.8 RKP and RGE Peripheral Signal Descriptions
  9. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  DCDC
    5. 8.5  Global LDO (GLDO)
    6. 8.6  Power Supply and Modules
    7. 8.7  Battery Monitor
    8. 8.8  Temperature Sensor
    9. 8.9  Power Consumption - Power Modes
    10. 8.10 Power Consumption - Radio Modes
    11. 8.11 Nonvolatile (Flash) Memory Characteristics
    12. 8.12 Thermal Resistance Characteristics
    13. 8.13 RF Frequency Bands
    14. 8.14 Bluetooth Low Energy - Receive (RX)
    15. 8.15 Bluetooth Low Energy - Transmit (TX)
    16. 8.16 Proprietary Radio Modes
    17. 8.17 2.4 GHz RX/TX CW
    18. 8.18 Timing and Switching Characteristics
      1. 8.18.1 Reset Timing
      2. 8.18.2 Wakeup Timing
      3. 8.18.3 Clock Specifications
        1. 8.18.3.1 48 MHz Crystal Oscillator (HFXT)
        2. 8.18.3.2 48 MHz RC Oscillator (HFOSC)
        3. 8.18.3.3 32 kHz Crystal Oscillator (LFXT)
        4. 8.18.3.4 32 kHz RC Oscillator (LFOSC)
    19. 8.19 Peripheral Characteristics
      1. 8.19.1 UART
        1. 8.19.1.1 UART Characteristics
      2. 8.19.2 SPI
        1. 8.19.2.1 SPI Characteristics
        2. 8.19.2.2 SPI Controller Mode
        3. 8.19.2.3 SPI Timing Diagrams - Controller Mode
        4. 8.19.2.4 SPI Peripheral Mode
        5. 8.19.2.5 SPI Timing Diagrams - Peripheral Mode
      3. 8.19.3 I2C
        1. 8.19.3.1 I2C
        2. 8.19.3.2 I2C Timing Diagram
      4. 8.19.4 GPIO
        1. 8.19.4.1 GPIO DC Characteristics
      5. 8.19.5 ADC
        1. 8.19.5.1 Analog-to-Digital Converter (ADC) Characteristics
      6. 8.19.6 Comparators
        1. 8.19.6.1 Ultra-low power comparator
  10. Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Bluetooth 5.3 Low Energy
      2. 9.3.2 802.15.4 (Thread and Zigbee)
    4. 9.4  Memory
    5. 9.5  Cryptography
    6. 9.6  Timers
    7. 9.7  Serial Peripherals and I/O
    8. 9.8  Battery and Temperature Monitor
    9. 9.9  µDMA
    10. 9.10 Debug
    11. 9.11 Power Management
    12. 9.12 Clock Systems
    13. 9.13 Network Processor
  11. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  12. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 Tools and Software
      1. 11.2.1 SimpleLink™ Microcontroller Platform
    3. 11.3 Documentation Support
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Timers

A large selection of timers are available as part of the CC2340R5 device. These timers are:

  • Real-Time Clock (RTC)

    The RTC is a 67-bit, 2-channel timer running on the LFCLK system clock. The RTC is active in STANDBY and ACTIVE power states. When the device enters the RESET or SHUTDOWN state the RTC is reset.

    The RTC accumulates time elapsed since reset on each LFCLK. The RTC counter is incremented by LFINC at a rate of 32.768 kHz. LFINC indicates the period of LFCLK in μs, with an additional granularity of 16 fractional bits.

    The counter can be read from two 32-bit registers. RTC.TIME8U has a range of approximately 9.5 hours with an LSB representing 8 microseconds. RTC.TIME524M has a range of approximately 71.4 years with an LSB representing 524 milliseconds.

    There is hardware synchronization between the system timer (SYSTIM) and the RTC so that the multi-channel and higher resolution SYSTIM remain in synchronization with the RTC’s time base.

    The RTC has two channels: one compare channel and one capture channel and is capable of waking the device out of the standby power state. The RTC compare channel is typically used only by system software and only during the standby power state.

  • System Timer (SYSTIM)
    The SYSTIM is a 34-bit, 5-channel wrap-around timer with a per-channel selectable 32b slice with either a 1 us resolution and 1h11m35s range or 250 ns resolution and 17m54s range. All channels support both capture and single-shot compare (posting an event) operation. One channel is reserved for system software, three channels are reserved for radio software and one channel is freely available to user applications.

    For software convenience a hardware synchronization mechanism automatically ensures that the RTC and SYSTIM share a common time base (albeit with different resolutions/spans). Another software convenience feature is that SYSTIM qualifies any submitted compare values so that the timer channel will immediately trigger if the submitted event is in the immediate past (4.294s with 1 us resolution and 1.049s with 250 ns resolution).

  • General Purpose Timers (LGPT)

    The CC2340R5 device provides four LGPTs with 3 × 16 bit timers and 1× 24 bit timer, all running on up to 48 MHz. The LGPTs support a wide range of features such as:

    • 3 capture/compare channels
    • One-shot or periodic counting
    • Pulse width modulation (PWM)
    • Time counting between edges and edge counting
    • Input filter implemented on each of the channels for all timers
    • IR generation feature available on Timer-0
    • Dead band feature available on Timer-1

    The timer capture/compare and PWM signals are connected to IOs via IO controller module (IOC) and the internal timer event connections to CPU, DMA and other peripherals are via the event fabric, which allows the timers to interact with signals such as GPIO inputs, other timers, DMA and ADC. Two LGPTs (2× 16 bit timers) supports quadrature decoder mode to enable buffered decoding of quadrature-encoded sensor signals. The LGPTs are available in device Active and Idle power modes.

    Table 9-1 Timer Comparison
    Feature Timer 0 Timer 1 Timer 2 Timer 3
    Counter Width 16-bit counter width 24-bit counter width 24-bit counter width 24-bit counter width
    Quadrature Decoder Yes No Yes No
    Park Mode on Fault No Yes No No
    Programmable Dead-Band Insertion No Yes No No
  • Watchdog timer

    The watchdog timer is used to regain control if the system operates incorrectly due to software errors. Upon counter expiry, the watchdog timer resets the device when periodic monitoring of the system components and tasks fails to verify proper functionality. The watchdog timer runs on a 32 kHz clock rate and operates in device active, idle, and standby modes and cannot be stopped once enabled.