SWRS215D April 2019 – May 2021 CC3235S , CC3235SF
The CC3235x device implements a sense-on-power (SOP) scheme to determine the device operation mode.
SOP values are sensed from the device pin during power up. This encoding determines the boot flow. Before the device is taken out of reset, the SOP values are copied to a register and used to determine the device operation mode while powering up. These values determine the boot flow as well as the default mapping (to JTAG, SWD, UART0) for some of the pins. Table 9-6 lists the pull configurations.
|BOOT MODE NAME||SOP||SOP||SOP||SOP MODE||COMMENT|
|UARTLOAD||Pullup||Pulldown||Pulldown||LDfrUART||Factory, lab flash, and SRAM loads through the UART. The device waits indefinitely for the UART to load code. The SOP bits then must be toggled to configure the device in functional mode. Also puts JTAG in 4-wire mode.|
|FUNCTIONAL_2WJ||Pulldown||Pulldown||Pullup||Fn2WJ||Functional development mode. In this mode, 2-pin SWD is available to the developer. TMS and TCK are available for debugger connection.|
|FUNCTIONAL_4WJ||Pulldown||Pulldown||Pulldown||Fn4WJ||Functional development mode. In this mode, 4-pin JTAG is available to the developer. TDI, TMS, TCK, and TDO are available for debugger connection.|
|UARTLOAD_FUNCTIONAL_4WJ||Pulldown||Pullup||Pulldown||LDfrUART_Fn4WJ||Supports flash and SRAM load through UART and functional mode. The MCU bootloader tries to detect a UART break on UART receive line. If the break signal is present, the device enters the UARTLOAD mode, otherwise, the device enters the functional mode. TDI, TMS, TCK, and TDO are available for debugger connection.|
|RET_FACTORY_IMAGE||Pulldown||Pullup||Pullup||RetFactDef||When device reset is toggled, the MCU bootloader kick-starts the procedure to restore factory default images.|
The recommended values of pull down resistors are 69.8-kΩ for SOP0 and SOP1 and 100-kΩ for SOP2. The application can use SOP2 for other functions after the device has powered up. To avoid spurious SOP values from being sensed at power up, TI strongly recommends using the SOP2 pin only for output signals. The SOP0 and SOP1 pins are used as 5 GHz control switch and are not available for other functions. Ensure the SOP pins are configured as shown in Figure 10-7, this is the recommended configuration to ensure the RF Switch, SOP boot modes, and Factory restore process operates optimally without conflict.