SWRS215D April 2019 – May 2021 CC3235S , CC3235SF
The Joint Test Action Group (JTAG) port is an IEEE standard that defines a test access port (TAP) and boundary scan architecture for digital integrated circuits and provides a standardized serial interface to control the associated test logic. For detailed information on the operation of the JTAG port and TAP controller, see the IEEE Standard 1149.1,Test Access Port and Boundary-Scan Architecture.
Figure 8-19 shows the JTAG timing diagram.
Table 8-29 lists the JTAG timing parameters.