SLOSE54C June 2020 – July 2022 DRV8428
PRODUCTION DATA
PIN | I/O | TYPE | DESCRIPTION | ||
---|---|---|---|---|---|
NAME | NO. | ||||
HTSSOP | WQFN | ||||
AOUT1 | 3 | 1 | O | Output | Winding A output. Connect to stepper motor winding. |
AOUT2 | 4 | 2 | O | Output | Winding A output. Connect to stepper motor winding. |
PGND | 2 | 16 | PWR | Power | Power ground. Connect to system ground. |
BOUT2 | 5 | 3 | O | Output | Winding B output. Connect to stepper motor winding |
BOUT1 | 6 | 4 | O | Output | Winding B output. Connect to stepper motor winding |
DIR | 14 | 12 | I | Input | Direction input. Logic level sets the direction of stepping; internal pulldown resistor. |
EN/nFAULT | 15 | 13 | I/O | Input/Output | Logic low to disable device outputs; logic high to enable. Also used for fault indication. Pulled logic low in fault condition. |
DVDD | 8 | 6 | PWR | Power | Logic supply voltage. Connect a X7R, 0.47-μF to 1-μF, 6.3-V or 10-V rated ceramic capacitor to GND. |
GND | 7 | 5 | PWR | Power | Device ground. Connect to system ground. |
VREF | 9 | 7 | I | Input | Current set reference input. Maximum value 3 V. DVDD can be used to provide VREF through a resistor divider. |
M0 | 10 | 8 | I | Input | Microstepping mode-setting pins. Sets the step mode; internal pulldown resistor. |
M1 | 12 | 10 | |||
DECAY/TOFF | 11 | 9 | I | Input | Decay-mode and off-time setting pin. See the Section 7.3.5 section for details. |
STEP | 13 | 11 | I | Input | Step input. A rising edge causes the indexer to advance one step; internal pulldown resistor. |
VM | 1 | 15 | PWR | Power | Power supply. Connect to motor supply voltage and bypass to PGND with a 0.01-µF ceramic capacitor plus a bulk capacitor rated for VM. |
nSLEEP | 16 | 14 | I | Input | Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown resistor. An nSLEEP low pulse clears faults. |
PAD | - | - | - | - | Thermal pad. Connect to system ground. |