SLOSE54C June 2020 – July 2022 DRV8428
PRODUCTION DATA
An analog current-limit circuit on each FET limits the current through the FET by removing the gate drive. If this current limit persists for longer than the tOCP time, the FETs in both H-bridges are disabled and the EN/nFAULT pin is driven low. Normal operation resumes automatically (motor-driver operation and EN/nFAULT released) after the tRETRY time has elapsed and the fault condition is removed.