SDLS967H may   2016  – july 2023 LSF0108-Q1

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information (Q1)
    5. 6.5 Electrical Characteristics - RKS Package
    6. 6.6 Electrical Characteristics - PW Package
    7. 6.7 Switching Characteristics (Translating Down)
    8. 6.8 Switching Characteristics (Translating Up)
    9. 6.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Auto Bidirectional Voltage Translation
      2. 8.3.2 Output Enable
      3. 8.3.3 Wettable Flanks
    4. 8.4 Device Functional Modes
      1. 8.4.1 Up and Down Translation
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 I2C PMBus, SMBus, GPIO
        1. 9.2.1.1 Design Requirements
          1. 9.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 9.2.1.1.2 Bias Circuitry
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Bidirectional Translation
          2. 9.2.1.2.2 Pull-Up Resistor Sizing
          3. 9.2.1.2.3 LSF0108-Q1 Bandwidth
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Mixed-Mode Voltage Translation
        1. 9.2.2.1 Single Supply Translation
        2. 9.2.2.2 Voltage Translation for Vref_B < Vref_A + 0.8 V
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Functional Modes

For each channel (n), when either the An or Bn port is LOW, the switch provides a low impedance path between the An and Bn ports; the corresponding Bn or An port will be pulled LOW. The low RON of the switch allows connections to be made with minimal propagation delay and signal distortion.

Table 8-1 provides a summary of device operation. For additional details on the functional operation of the LSF family of devices, see the Down Translation with the LSF Family and Up Translation with the LSF Family videos.

Table 8-2 Device Functionality
Signal Direction(1)Input StateSwitch StateFunctionality
B to A (Down Translation)B = LOWON
(Low Impedance)
A-side voltage is pulled low through the switch to the B-side voltage
B = HIGHOFF
(High Impedance)
A-side voltage is clamped at Vref_A (2)
A to B (Up Translation)A = LOWON
(Low Impedance)
B-side voltage is pulled low through the switch to the A-side voltage
A = HIGHOFF
(High Impedance)
B-side voltage is clamped at Vref_A and then pulled up to the VPU supply voltage
The downstream channel should not be actively driven through a low impedance driver, or else bus contention may occur.
The A-side can have a pullup to Vref_A for additional current drive capability or may also be pulled above Vref_A with a pullup resistor. Specifications in the Recommended Operating Conditions section should always be followed.