SDLS967H may   2016  – july 2023 LSF0108-Q1

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information (Q1)
    5. 6.5 Electrical Characteristics - RKS Package
    6. 6.6 Electrical Characteristics - PW Package
    7. 6.7 Switching Characteristics (Translating Down)
    8. 6.8 Switching Characteristics (Translating Up)
    9. 6.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Auto Bidirectional Voltage Translation
      2. 8.3.2 Output Enable
      3. 8.3.3 Wettable Flanks
    4. 8.4 Device Functional Modes
      1. 8.4.1 Up and Down Translation
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 I2C PMBus, SMBus, GPIO
        1. 9.2.1.1 Design Requirements
          1. 9.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 9.2.1.1.2 Bias Circuitry
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Bidirectional Translation
          2. 9.2.1.2.2 Pull-Up Resistor Sizing
          3. 9.2.1.2.3 LSF0108-Q1 Bandwidth
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Mixed-Mode Voltage Translation
        1. 9.2.2.1 Single Supply Translation
        2. 9.2.2.2 Voltage Translation for Vref_B < Vref_A + 0.8 V
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
Bias Circuitry

For proper operation, VCCA must always be at least 0.8 V less than VCCB (VCCA + 0.8 ≦ VCCB). The 200 kΩ bias resistor is required to allow Vref_B to regulate the EN input and properly bias the device for translation. A 0.1 µF capacitor is recommended for providing a path from Vref_B to ground for high frequency noise. Vref_B and VI(EN) are recommended to be 1.0 V higher than Vref_A for best signal integrity.

Attempting to drive the EN pin directly with a push-pull output device is a very common design error with the LSF0108-Q1 series of devices. It is also very important to note that current does flow into the A-side voltage supply during normal operation. Not all voltage sources can sink current, so be sure that applicable designs can handle this current. For more design details, see the Understanding the Bias Circuit for the LSF Family video.

GUID-20221129-SS0I-29JL-X5TD-DLWLJST33Q09-low.svgFigure 9-2 Bias Circuitry Inside the LSF010x Device