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Auto-direction voltage translators

LSF0108-Q1

ACTIVE

Automotive eight-channel bidirectional multi-voltage-level translator

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Data sheet

LSF0108-Q1

ACTIVE
Data sheet Order now

Product details

Technology family LSF Applications I2C Bits (#) 8 Data rate (max) (MBps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
Technology family LSF Applications I2C Bits (#) 8 Data rate (max) (MBps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5
  • AEC-Q100 qualified with the following results:
    • Device HBM ESD classification level 2000-V
    • Device CDM ESD classification level 1000-V

  • Available in wettable flank VQFN (RKS) package

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≤ 30-pF capacitive load and up to 40 MHz up or down translation at 50-pF capacitive load
  • Supports hot insertion
  • Allow bidirectional voltage level translation between
    • 0.65 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V (RKS package only)
    • 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.8 V ↔ 2.5 V, 3.3 V, 5 V
    • 2.5 V ↔ 3.3 V, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low r on provides less signal distortion
  • High-impedance I/O pins for EN = low
  • Flow-through pin-out for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD 17
  • –40°C to +125°C operating temperature range
  • AEC-Q100 qualified with the following results:
    • Device HBM ESD classification level 2000-V
    • Device CDM ESD classification level 1000-V

  • Available in wettable flank VQFN (RKS) package

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≤ 30-pF capacitive load and up to 40 MHz up or down translation at 50-pF capacitive load
  • Supports hot insertion
  • Allow bidirectional voltage level translation between
    • 0.65 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V (RKS package only)
    • 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.8 V ↔ 2.5 V, 3.3 V, 5 V
    • 2.5 V ↔ 3.3 V, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low r on provides less signal distortion
  • High-impedance I/O pins for EN = low
  • Flow-through pin-out for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD 17
  • –40°C to +125°C operating temperature range

  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≦ 30 pF capacitive load and up to 40 MHz up and down translation at 50 pF capacitive load:
    • Allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO)
  • Bidirectional voltage translation without DIR pin:
    • Minimizes system effort to develop voltage translation for bidirectional interface (PMBus, I 2C, or SMbus)
  • 5 V tolerance on IO port and 125°C support:
    • With 5 V tolerance and 125°C support, the LSF family is flexible and compliant with TTL levels in industrial and telecom applications
  • Channel specific translation:
    • The LSF family is able to set up different voltage translation levels on each channel

  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≦ 30 pF capacitive load and up to 40 MHz up and down translation at 50 pF capacitive load:
    • Allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO)
  • Bidirectional voltage translation without DIR pin:
    • Minimizes system effort to develop voltage translation for bidirectional interface (PMBus, I 2C, or SMbus)
  • 5 V tolerance on IO port and 125°C support:
    • With 5 V tolerance and 125°C support, the LSF family is flexible and compliant with TTL levels in industrial and telecom applications
  • Channel specific translation:
    • The LSF family is able to set up different voltage translation levels on each channel
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Technical documentation

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Type Title Date
* Data sheet LSF0108-Q1 Automotive 8-Channel Multi-Voltage Level Translator datasheet (Rev. H) PDF | HTML 18 Jul 2023
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
EVM User's guide LSF-EVM Hardware User's Guide 05 Jul 2017
Technical article How to shift your automotive design to another level 17 Aug 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
Not available on TI.com
Evaluation board

LSF-EVM — 1 to 8-bit LSF Translator Family Evaluation Module

The LSF family of devices are level translators that support a voltage range of 0.95V and 5V and provide multi-voltage bidirectional translation without a direction pin.

The LSF-EVM comes populated with the LSF0108PWR device and has landing patterns that are compatible with the LSF0101DRYR, (...)

User guide: PDF
Not available on TI.com
Package Pins Download
TSSOP (PW) 20 View options
VQFN (RKS) 20 View options
TI's Standard Terms and Conditions for Evaluation Items apply.

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