SDLS967H may   2016  – july 2023 LSF0108-Q1

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information (Q1)
    5. 6.5 Electrical Characteristics - RKS Package
    6. 6.6 Electrical Characteristics - PW Package
    7. 6.7 Switching Characteristics (Translating Down)
    8. 6.8 Switching Characteristics (Translating Up)
    9. 6.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Auto Bidirectional Voltage Translation
      2. 8.3.2 Output Enable
      3. 8.3.3 Wettable Flanks
    4. 8.4 Device Functional Modes
      1. 8.4.1 Up and Down Translation
  10. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 I2C PMBus, SMBus, GPIO
        1. 9.2.1.1 Design Requirements
          1. 9.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 9.2.1.1.2 Bias Circuitry
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Bidirectional Translation
          2. 9.2.1.2.2 Pull-Up Resistor Sizing
          3. 9.2.1.2.3 LSF0108-Q1 Bandwidth
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Mixed-Mode Voltage Translation
        1. 9.2.2.1 Single Supply Translation
        2. 9.2.2.2 Voltage Translation for Vref_B < Vref_A + 0.8 V
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≦ 30 pF capacitive load and up to 40 MHz up and down translation at 50 pF capacitive load:
    • Allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO)
  • Bidirectional voltage translation without DIR pin:
    • Minimizes system effort to develop voltage translation for bidirectional interface (PMBus, I2C, or SMbus)
  • 5 V tolerance on IO port and 125°C support:
    • With 5 V tolerance and 125°C support, the LSF family is flexible and compliant with TTL levels in industrial and telecom applications
  • Channel specific translation:
    • The LSF family is able to set up different voltage translation levels on each channel
Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
LSF0108-Q1PW (TSSOP, 20)6.5 mm × 6.4 mm
RKS (VQFN, 20)4.5 mm × 2.5 mm
For all available packages, see the orderable addendum at the end of the data sheet.
The package size (length × width) is a nominal value and includes pins, where applicable.