SLLS732A October   2006  – November 2019 SN65LBC174A-EP

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Device Images
      1.      Logic Diagram (Positive Logic)
  4. 4Revision History
  5. 5Description (continued)
    1. 5.1 Pin Configuration and Functions
      1.      Pin Functions
    2. 5.2 Specifications
      1. 5.2.1 Absolute Maximum Ratings
      2. 5.2.2 ESD Ratings
      3. 5.2.3 Recommended Operating Conditions
      4. 5.2.4 Thermal Information
      5. 5.2.5 Electrical Characteristics
      6. 5.2.6 Switching Characteristics
      7. 5.2.7 Typical Characteristics
    3. 5.3 Parameter Measurement Information
    4. 5.4 Detailed Description
      1. 5.4.1 Overview
      2. 5.4.2 Functional Block Diagram
      3. 5.4.3 Feature Description
      4. 5.4.4 Device Functional Modes
    5. 5.5 Application and Implementation
      1. 5.5.1 Application Information
      2. 5.5.2 Typical Application
        1. 5.5.2.1 Design Requirements
        2. 5.5.2.2 Detailed Design Procedure
        3. 5.5.2.3 Application Curve
    6. 5.6 Power Supply Recommendations
    7. 5.7 Layout
      1. 5.7.1 Layout Guidelines
      2. 5.7.2 Layout Example
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Parameter Measurement Information

SN65LBC174A-EP pmi1_lls732.gifFigure 7. Test Circuit, VOD Without Common-Mode Loading
SN65LBC174A-EP pmi2_lls732.gifFigure 8. Test Circuit, VOD With Common-Mode Loading
SN65LBC174A-EP pmi3_lls732.gif
PRR = 1 MHz, 50% duty cycle, tr  < 6 ns, tf  < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance.
Figure 9. VOC Test Circuit
SN65LBC174A-EP pmi4_lls732.gif
PRR = 1 MHz, 50% duty cycle, tr  < 6 ns, tf  < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance.
Figure 10. Output Switching Test Circuit and Waveforms
SN65LBC174A-EP pmi5_lls732.gif
PRR = 1 MHz, 50% duty cycle, tr  < 6 ns, tf  < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance.
3 V if testing Y output, 0 V if testing Z output.
Figure 11. Enable Timing Test Circuit and Waveforms, TPZH and TPHZ
SN65LBC174A-EP pmi6_lls732.gif
PRR = 1 MHz, 50% duty cycle, tr  < 6 ns, tf  < 6 ns, ZO = 50 Ω
Includes probe and jig capacitance.
3 V if testing Y output, 0 V if testing Z output.
Figure 12. Enable Timing Test Circuit and Waveforms, TPZL and TPLZ
SN65LBC174A-EP pmi7_lls732.gifFigure 13. Test Circuit, Short-Circuit Output Current
SN65LBC174A-EP pmi8_lls732.gifFigure 14. Test Circuit Waveform, Transient Overvoltage Test
SN65LBC174A-EP equiv_lls732.gifFigure 15. Equivalent Input and Output Schematic Diagrams