SPRSP96A March 2024 – September 2024 TDA4AEN-Q1 , TDA4VEN-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Table 6-40, Table 6-41, Figure 6-33, Table 6-42, and Figure 6-34 present timing conditions, timing requirements, and switching characteristics for CPTS.
PARAMETER | MIN | MAX | UNIT | |
---|---|---|---|---|
INPUT CONDITIONS | ||||
SRI | Input slew rate | 0.5 | 5 | V/ns |
OUTPUT CONDITIONS | ||||
CL | Output load capacitance | 2 | 10 | pF |
NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
---|---|---|---|---|---|
T1 | tw(HWTSPUSHH) | Pulse duration, HWnTSPUSH high | 12P(1) + 2 | ns | |
T2 | tw(HWTSPUSHL) | Pulse duration, HWnTSPUSH low | 12P(1) + 2 | ns | |
T3 | tc(RFT_CLK) | Cycle time, RFT_CLK | 5 | 8 | ns |
T4 | tw(RFT_CLKH) | Pulse duration, RFT_CLK high | 0.45T(2) | ns | |
T5 | tw(RFT_CLKL) | Pulse duration, RFT_CLK low | 0.45T(2) | ns |
NO. | PARAMETER | DESCRIPTION | SOURCE | MIN | MAX | UNIT |
---|---|---|---|---|---|---|
T6 | tw(TS_COMPH) | Pulse duration, TS_COMP high | 36P(1) - 2 | ns | ||
T7 | tw(TS_COMPL) | Pulse duration, TS_COMP low | 36P(1) - 2 | ns | ||
T8 | tw(TS_SYNCH) | Pulse duration, TS_SYNC high | 36P(1) - 2 | ns | ||
T9 | tw(TS_SYNCL) | Pulse duration, TS_SYNC low | 36P(1) - 2 | ns | ||
T10 | tw(SYNC_OUTH) | Pulse duration, SYNCn_OUT high | TS_SYNC | 36P(1) - 2 | ns | |
GENF | 5P(1) - 2 | ns | ||||
T11 | tw(SYNC_OUTL) | Pulse duration, SYNCn_OUT low | TS_SYNC | 36P(1) - 2 | ns | |
GENF | 5P(1) - 2 | ns |
For more information, see Data Movement Architecture (DMA) chapter in the device TRM.