SPRSP96A March 2024 – September 2024 TDA4AEN-Q1 , TDA4VEN-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Figure 6-16 shows the recommended crystal circuit. All discrete components used to implement the oscillator circuit must be placed as close as possible to the MCU_OSC0_XI and MCU_OSC0_XO pins.
The crystal must be in the fundamental mode of operation and parallel resonant. Table 6-21 summarizes the required electrical constraints.
PARAMETER | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|
Fxtal | Crystal Parallel Resonance Frequency | 25 | MHz | ||||
Fxtal | Crystal Frequency Stability and Tolerance | Ethernet RGMII and RMII not used | ±100 | ppm | |||
Ethernet RGMII and RMII using derived clock | ±50 | ||||||
CL1+PCBXI | Capacitance of CL1 + CPCBXI | 12 | 24 | pF | |||
CL2+PCBXO | Capacitance of CL2 + CPCBXO | 12 | 24 | pF | |||
CL | Crystal Load Capacitance | 6 | 12 | pF | |||
Cshunt | Crystal Circuit Shunt Capacitance | ESRxtal = 30Ω | 25MHz | 7 | pF | ||
ESRxtal = 40Ω | 25MHz | 5 | pF | ||||
ESRxtal = 50Ω | 25MHz | 5 | pF | ||||
ESRxtal | Crystal Effective Series Resistance | (1) | Ω |
When selecting a crystal, the system design must consider temperature and aging characteristics of the crystal based on worst case environment and expected life expectancy of the system.
Table 6-22 details the switching characteristics of the oscillator.
PARAMETER | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|
CXI | XI Capacitance | 2.04 | pF | ||
CXO | XO Capacitance | 1.91 | pF | ||
CXIXO | XI to XO Mutual Capacitance | 0.01 | pF | ||
ts | Start-up Time | 4 | ms |