SPRSP96A March 2024 – September 2024 TDA4AEN-Q1 , TDA4VEN-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
1.8V MODE | |||||||
VIL | Input Low Voltage | 0.35 × VDD(1) | V | ||||
VILSS | Input Low Voltage Steady State | 0.3 × VDD(1) | V | ||||
VIH | Input High Voltage | 0.65 × VDD(1) | V | ||||
VIHSS | Input High Voltage Steady State | 0.85 × VDD(1) | V | ||||
VHYS | Input Hysteresis Voltage | 150 | mV | ||||
IIN | Input Leakage Current. | VI =
1.8V or VI = 0.0V |
±10 | µA | |||
RPU | Pull-up Resistor | 15 | 22 | 30 | kΩ | ||
RPD | Pull-down Resistor | 15 | 22 | 30 | kΩ | ||
VOL | Output Low Voltage | 0.45 | V | ||||
VOH | Output High Voltage | VDD(1) - 0.45 | V | ||||
IOL(2) | Low Level Output Current | VOL(MAX) | 3 | mA | |||
IOH(2) | High Level Output Current | VOH(MIN) | 3 | mA | |||
SRI(4) | Input Slew Rate | 18f(3) or 1.8E+6 |
V/s | ||||
3.3V MODE | |||||||
VIL | Input Low Voltage | 0.8 | V | ||||
VILSS | Input Low Voltage Steady State | 0.6 | V | ||||
VIH | Input High Voltage | 2.0 | V | ||||
VIHSS | Input High Voltage Steady State | 2.0 | V | ||||
VHYS | Input Hysteresis Voltage | 150 | mV | ||||
IIN | Input Leakage Current. | VI =
3.3V or VI = 0.0V |
±10 | µA | |||
RPU | Pull-up Resistor | 15 | 22 | 30 | kΩ | ||
RPD | Pull-down Resistor | 15 | 22 | 30 | kΩ | ||
VOL | Output Low Voltage | 0.4 | V | ||||
VOH | Output High Voltage | 2.4 | V | ||||
IOL(2) | Low Level Output Current | VOL(MAX) | 5 | mA | |||
IOH(2) | High Level Output Current | VOH(MIN) | 9 | mA | |||
SRI(4) | Input Slew Rate | 33f(3) or 3.3E+6 |
V/s |