SLVS568E
January 2005 – July 2025
TLV341
,
TLV341A
,
TLV342
,
TLV342S
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information: TLV341
5.5
Thermal Information: TLV342
5.6
Thermal Information: TLV342S
5.7
Electrical Characteristics: V+ = 1.8V
5.8
Electrical Characteristics: V+ = 5V
5.9
Shutdown Characteristics: V+ = 1.8V
5.10
Shutdown Characteristics: V+ = 5V
5.11
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
PMOS Input Stage
6.3.2
CMOS Output Stage
6.3.3
Shutdown
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Receiving Notification of Documentation Updates
8.2
Support Resources
8.3
Trademarks
8.4
Electrostatic Discharge Caution
8.5
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|6
MPDS114F
DRL|6
MPDS159I
DBV|6
MPDS026Q
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvs568e_oa
slvs568e_pm
1
Features
1.8V and 5V performance
Low offset (A grade)
1.25mV maximum (25°C)
1.7mV maximum (–40°C to 125°C)
Rail-to-rail output swing
Wide common-mode input voltage range: –0.2V to (V
+
– 0.5V)
Input bias current: 1pA (typical)
Input offset voltage: 0.3mV (typical)
Low supply current: 70μA/channel
Low shutdown current:
10pA (typical) per channel
Gain bandwidth: 2.3MHz (typical)
Slew rate: 0.9V/μs (typical)
Turnon time from shutdown: 5μs (typical)
Input referred voltage noise (at 10kHz):
20nV/√
Hz
ESD protection exceeds JESD 22:
2000V Human-Body Model (HBM)
750V Charged-device model (CDM)