SLVSD88L July 2016 – August 2021 TPS61099
PRODUCTION DATA
For best output and input voltage filtering, low ESR X5R or X7R ceramic capacitors are recommended.
The input capacitor minimizes input voltage ripple, suppresses input voltage spikes and provides a stable system rail for the device. An input capacitor value of 10 μF is normally recommended to improve transient behavior of the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and GND pins of the IC is recommended.
For the output capacitor of VOUT pin, small ceramic capacitors are recommended, placed as close as possible to the VOUT and GND pins of the IC. If, for any reason, the application requires the use of large capacitors which cannot be placed close to the IC, the use of a small ceramic capacitor with a capacitance value of 1 μF in parallel to the large one is recommended. This small capacitor should be placed as close as possible to the VOUT and GND pins of the IC.
From the power stage point of view, the output capacitor sets the corner frequency of the converter while the inductor creates a Right-Half-Plane-Zero. Consequently, with a larger inductor, a larger output capacitor must be used. The TPS61099x is optimized to work with the inductor from 1 µH to 2.2 µH, so the minimal output capacitor value is 20 μF (nominal value). Increasing the output capacitor makes the output ripple smaller in PWM mode.
When selecting capacitors, ceramic capacitor’s derating effect under bias should be considered. Choose the right nominal capacitance by checking capacitor's DC bias characteristics. In this example, GRM188R60J106ME84D, which is a 10-µF ceramic capacitor with high effective capacitance value at DC biased condition, is selected for VOUT rail. The performance of TPS61099x is shown in Application Curves section.