SLVSFS7A March   2021  – January 2024 TPS62901

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Mode Selection and Device Configuration MODE/S-CONF
      2. 6.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 6.3.3 Setable VO Operation (VSET and Internal Voltage Divider)
      4. 6.3.4 Soft Start / Tracking (SS/TR)
      5. 6.3.5 Smart Enable with Precise Threshold
      6. 6.3.6 Power Good (PG)
      7. 6.3.7 Undervoltage Lockout (UVLO)
      8. 6.3.8 Current Limit And Short-Circuit Protection
      9. 6.3.9 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Pulse Width Modulation (PWM) Operation
      2. 6.4.2 AEE (Automatic Efficiency Enhancement)
      3. 6.4.3 Power Save Mode Operation (Auto PFM/PWM)
      4. 6.4.4 100% Duty-Cycle Operation
      5. 6.4.5 Output Discharge Function
      6. 6.4.6 Starting into a Prebiased Load
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application with Adjustable Output Voltage
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Programming the Output Voltage
        3. 7.2.2.3 External Component Selection
        4. 7.2.2.4 Inductor Selection
        5. 7.2.2.5 Capacitor Selection
          1. 7.2.2.5.1 Output Capacitor
          2. 7.2.2.5.2 Input Capacitor
          3. 7.2.2.5.3 Soft-Start Capacitor
        6. 7.2.2.6 Tracking Function
        7. 7.2.2.7 Output Filter and Loop Stability
      3. 7.2.3 Application Curves
      4. 7.2.4 Typical Application with Setable VO using VSET
        1. 7.2.4.1 Design Requirements
        2. 7.2.4.2 Detailed Design Procedure
        3. 7.2.4.3 Application Curves
    3. 7.3 System Examples
      1. 7.3.1 LED Power Supply
      2. 7.3.2 Powering Multiple Loads
      3. 7.3.3 Voltage Tracking
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
        1. 7.5.2.1 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RPJ|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.6 Power Good (PG)

The TPS62901 has a built-in Power-Good (PG) feature to indicate whether the output voltage has reached the target and the device is ready. The PG signal can be used for start-up sequencing of multiple rails. The PG pin is an open-drain output that requires a pullup resistor to any voltage up to the recommended input voltage level. PG is low when the device is turned off due to EN, UVLO (undervoltage lockout), or thermal shutdown. VIN must remain present for the PG pin to stay low.

If the power-good output is not used, TI recommends to tie to GND or leave open.

Table 6-3 Power-Good Indicator Functional Table
LOGIC SIGNALSPG STATUS
VIEN-PINTHERMAL SHUTDOWNVO
VI > UVLOHIGHNoVO on targetHigh Impedance
VO < targetLOW
YesxLOW
LOWxxLOW
1.8V< VI < UVLOxxxLOW
VI < 1.8VxxxUndefined