The TPS65903x-Q1 device integrates eight configurable general-purpose I/Os that are multiplexed with alternative features as described in Table 6-5.
|TERMINAL||PRIMARY FUNCTION||SECONDARY FUNCTION|
|GPIO_1||General-purpose I/O||Output: VBUSDET (VBUS detection)|
|GPIO_2||General-purpose I/O||Output: REGEN2|
|GPIO_4||General-purpose I/O||Output: SYSEN1 (external system enable)|
|GPIO_5||General-purpose I/O||Output: CLK32KGO1V8 (32-kHz digital-fated output clock in VRTC domain) or SYNCCLKOUT (Fallback synchronization clock for SMPS, 2.2MHz)|
|GPIO_6||General-purpose I/O||Output: SYSEN2 (external system enable)|
|GPIO_7||General-purpose I/O||Input: POWERHOLD|
For GPIO characteristics, refer to:
Each GPIO event can generate an interrupt on either rising and/or falling edge and each line is individually maskable (as described in Section 6.3.8)
All GPIOs can be used as wake-up events.
GPIO_4 and GPIO_6 are in the VIO domain and need the I/O supply to be available.
When configured in OTP as SYSEN1 and SYSEN2, GPIO_4 and GPIO_6 can be programmed to be part of power-up sequence.
Selection between primary and secondary functions is controlled through the registers PRIMARY_SECONDARY_PAD1 and PRIMARY_SECONDARY_PAD2.
When configured as primary functions, all GPIOs are controlled through the following set of registers:
When configured as secondary functions, none of the GPIO control registers (see Table 6-5) affect GPIO lines. Line configuration (pullup, pulldown, open-drain) for secondary functions is held in a separate register set, as well as specific function settings.