SLUSD66D September 2019 – February 2021 TPS92520-Q1
PRODUCTION DATA
Figure 7-42 shows the CH1VLED register. Table 7-30 describes the CH1VLED register.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CH1VLED[7:0] | |||||||
| R-00000000b | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-0 | CH1VLED | R | 00000000 | ADC measurement of the CSN1 node for channel 1. The CSN1 pin voltage is internally attenuated by 0.037 to achieve an 8-bit conversion ratio of 65/255 (V/dec). The full scale reading represents 65 V at CSN1 node. |