Layout is critical for good power-supply design. Section 10.2 shows the recommended PCB-layout configuration. A list of PCB layout considerations using these devices is listed as follows:

• As with any switching regulator, several power or signal paths exist that conduct fast switching voltages or currents. Minimize the loop area formed by these paths and their bypass connections.
• Bypass the PVIN pins to PGND with a low-impedance path. Place the input bypass capacitors of the power-stage as close as physically possible to the PVIN and PGND pins. A high-frequency bypass capacitor is integrated to reduce switching spikes and EMI. Additional EMI bypass capacitor can be placed on the other side of the PCB directly underneath the device to keep a minimum loop.
• The AVIN bypass capacitor should be placed close to the AVIN pin and provide a low-impedance path to PGND at the thermal pad.
• Keep signal components local to the device, and place them as close as possible to the pins to which they are connected. These components include the VOSNS and GOSNS series resistors and differential filter capacitor as well as MSEL1, MSEL2, VSEL, and ADRSEL resistors. Those components can be terminated to AGND with a minimum return loop or bypassed to the copper area of a separate low-impedance analog ground (AGND) that is isolated from fast switching voltages and current paths and has single connection to PGND on the thermal pad through the AGND pin. For placement recommendations, see Section 10.2.
• The PGND pins must be directly connected to the thermal pad of the device on the PCB, with a low-noise, low-impedance path.
• Route the VOSNS and GOSNS lines from the output capacitor bank at the load back to the device pins as a tightly coupled differential pair. These traces must be kept away from switching or noisy areas which can add differential-mode noise.
• Use caution when routing of the SYNC, VSHARE, BCX_CLK, and BCX_DAT traces for stackable configurations. The SYNC trace carries a rail-to-rail signal and should be routed away from sensitive analog signals, including the VSHARE, VOSNS, and GOSNS signals. The VSHARE traces must also be kept away from fast switching voltages or currents formed by the PVIN, AVIN, SW, and VDD5 pins.