SLUSEJ1 December 2021 TPSM8D6C24
|Write Transaction:||Write Byte|
|Read Transaction:||Read Byte|
|Format:||Unsigned Binary (1 byte)|
The VIN_OV_FAULT_RESPONSE command instructs the device on what action to take in response to a PVIN Overvoltage Fault. Upon triggering the PVIN overvoltage fault, the converter responds per the data byte below, and the following actions are taken:
|LEGEND: R/W = Read/Write; R = Read only|
|7:6||VIN_OVF_ RESP||RW||NVM||PVIN Overvoltage fault response|
00b: Ignore. Continue operating without interruption.
01b: Delayed Shutdown Continue Operating for a number of switching cycles defined by VIN_OVF_DLY, then if fault persists, shut down and restart according to VIN_OV_RETRY.
10b: Immediate Shutdown. Shut down and restart according to VIN_OV_RETRY.
11b: Invalid / Not Supported
|5:3||VIN_OVF_ RETRY||RW||NVM||PVIN Overvoltage retry|
0d: Do not attempt to restart (latch off).
1d-6d: After shutting down, wait one HICCUP period, and attempt to restart up to 1 - 6 times. After 1 - 6 failed restart attempts, do not attempt to restart (latch off). Restart attempts that occur while PVIN voltage is above VIN_OV_FAULT_LIMIT will not be observable but will be counted
7d: After shutting down, wait one HICCUP period, and attempt to restart indefinitely, until commanded OFF, or a successful start-up occurs.
|2:0||VIN_OVF_ DLY||RW||NVM||PVIN Overvoltage delay time for respond after delay and HICCUP|
0d: Shutdown delay of one PWM_CLK, HICCUP equal to TON_RISE
1d: Shutdown delay of one PWM_CLK, HICCUP equal to TON_RISE
2d - 4d: Shutdown delay of three PWM_CLK, HICCUP equal to 2 - 4 times TON_RISE
5d - 7d: Shutdown delay of seven PWM_CLK, HICCUP equal to 5 - 7 times TON_RISE
Attempts to write Section 7.6.46 to any value outside those specified as valid will be considered invalid/unsupported data and cause the TPSM8D6C24 to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.