SLOSEG3 October   2025 TRF1305A2

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - AC Specifications in D2D Configuration
    6. 6.6 Electrical Characteristics - AC Specifications in S2D Configuration
    7. 6.7 Electrical Characteristics - DC and Timing Specifications
    8. 6.8 Typical Characteristics: D2D Configuration
    9. 6.9 Typical Characteristics: S2D Configuration
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential RF Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC-Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305A2 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RYP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.1.1 Single-Ended Input

In the single-ended input configuration, one of the amplifier input pins is driven from a source while the other input is terminated with an external resistor. Figure 8-1 shows a dc-coupled, single-ended input configuration driven from and matched to a 50Ω source. Figure 8-1 shows how the non-driven INM pin is terminated with an external resistor to match to a source with the same 50Ω impedance at the INP pin.

CSH in Figure 8-1 is typically open. The performance curves shown in Section 6.9 are with input de-embedded up to device input pin, and output de-embedded up to device output pins. Therefore, Sss11 shown in Section 6.9 represents the input return loss at the amplifier input. The input return loss (Sss11) at CSH is improved by installing CSH with a value of 0.3pF. Figure 8-3 shows this improvement without impacting the frequency flatness within the amplifier bandwidth in Figure 8-2. Using CSH does not impact on noise figure and linearity.

TRF1305A2 DC-Coupled, Single-Ended Input Matched to a 50Ω Source Figure 8-1 DC-Coupled, Single-Ended Input Matched to a 50Ω Source
TRF1305A2 Power Gain (Sds21) Against CSH
At TA = 25℃, VS = 5V, input de-embedded up to CSH
Figure 8-2 Power Gain (Sds21) Against CSH
TRF1305A2 Input Return Loss (Sss11) Against CSH
At TA = 25℃, VS = 5V, input de-embedded up to CSH
Figure 8-3 Input Return Loss (Sss11) Against CSH

Figure 8-4 shows how to configure the design in Figure 8-1 for single-ended, ac-coupled input by adding ac-coupling capacitors in series at the input and output.

TRF1305A2 AC-Coupled, Single-Ended Input Matched to a 50Ω Source Figure 8-4 AC-Coupled, Single-Ended Input Matched to a 50Ω Source