SLOSEG3 October   2025 TRF1305A2

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - AC Specifications in D2D Configuration
    6. 6.6 Electrical Characteristics - AC Specifications in S2D Configuration
    7. 6.7 Electrical Characteristics - DC and Timing Specifications
    8. 6.8 Typical Characteristics: D2D Configuration
    9. 6.9 Typical Characteristics: S2D Configuration
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential RF Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC-Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305A2 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RYP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

Figure 5-1 RYP Package (Dual-Channel), 16-Pin WQFN-FCRLF (Top View)
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.
GND A1, A2, A3, A4 — Ground. Connect to ground plane on the board. Internally shorted to the thermal pad.
INM11InputNegative side of differential input signal for channel 1 (Ch1).
INM25InputNegative side of differential input signal for channel 2 (Ch2).
INP12InputPositive side of differential input signal for channel 1 (Ch1).
INP24InputPositive side of differential input signal for channel 2 (Ch2).
MODE7InputMode selection pin. For details, see the Mode Pin section.
OUTM112OutputNegative side of differential output signals for Ch1.
OUTM210OutputNegative side of differential output signals for Ch2.
OUTP113OutputPositive side of differential output signals for Ch1.
OUTP29OutputPositive side of differential output signals for Ch2.
PD116InputPower-down signal for Ch1, referenced to GND. Supports both 1.8V and 3.3V logic.
Logic 0 or open = channel enabled. Logic 1 = channel powered down.
PD26InputPower-down signal for Ch2, referenced to GND. Supports both 1.8V and 3.3V Logic.
Logic 0 or open = channel enabled. Logic 1 = channel powered down.
VOCM15InputOutput common-mode voltage input pin. Common for both channels. Float the pin to set the output common-mode voltage to VS– + 2.5V.
VS–3, 11PowerNegative supply pin. Common for both channels.
VS1+14PowerPositive supply pin for Ch1. Maintain that VS1+ = VS2+.
VS2+8PowerPositive supply pin for Ch2. Maintain that VS1+ = VS2+.
Thermal Pad17, 18, 19—Thermal pad. Connect to heat-dissipating ground plane on the board. Internally shorted to GND.