SLUSA12F December 2009 – October 2020 UCC28C40-Q1 , UCC28C41-Q1 , UCC28C42-Q1 , UCC28C43-Q1 , UCC28C44-Q1 , UCC28C45-Q1
PRODUCTION DATA
Slope compensation is the large signal subharmonic instability that can occur with duty cycles that may extend beyond 50% where the rising primary side inductor current slope may not match the falling secondary side current slope. The subharmonic oscillation would result in an increase in the output voltage ripple and may even limit the power handling capability of the converter.
The target of slope compensation is to achieve an ideal quality coefficient (Q_{P}), equal to 1 at half of the switching frequency. The Q_{P} is calculated with Equation 31.
where
where
The optimal goal of the slope compensation is to achieve Q_{P} = 1; upon rearranging Equation 32 the ideal value of slope compensation factor is determined:
For this design to have adequate slope compensation, M_{C} must be 2.193 when D reaches it maximum value of 0.627.
The inductor rising slope (S_{n}) at the CS pin is calculated with Equation 34.
The compensation slope (S_{e}) is calculated with Equation 35.
The compensation slope is added into the system through R_{RAMP} and R_{CSF}. The C_{RAMP} is an AC-coupling capacitor that allows the voltage ramp of the oscillator to be used without adding an offset to the current sense; select a value to approximate a high-frequency short circuit, such as 10 nF, as a starting point and make adjustments if required. The R_{RAMP} and R_{CSF} resistors form a voltage divider from the oscillator charge slope and this proportional ramp is injected into the CS pin to add slope compensation. Choose the value of R_{RAMP} to be much larger than the R_{RT} resistor so that it does not load down the internal oscillator and result in a frequency shift. The oscillator charge slope is calculated using the peak-to-peak voltage of the RT/CT sawtooth waveform (V_{OSCpp}) equal to 1.9 V, and the minimum ON time, as shown in Equation 37.
To achieve a 44.74-mV/µs compensation slope, R_{CSF} is calculated with Equation 38. In this design, R_{RAMP} is selected as 24.9 kΩ, a 3.8-kΩ resistor was selected for R_{CSF}.
It has to be noticed that due to the PN junction of the BJT transistor, it can only source current, which means the capacitor C_{RAMP} can only be charged, not discharged. Therefore, an extra discharge resistor R_{DIS} is needed. Choose R_{DIS} to be 1/10 of the R_{RAMP}.