JAJSJG6A december   2021  – june 2023 TDP0604

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  4-Level Inputs
      2. 8.3.2  I/O Voltage Level Selection
      3. 8.3.3  HPD_OUT
      4. 8.3.4  Lane Control
      5. 8.3.5  Swap
      6. 8.3.6  Linear and Limited Redriver
      7. 8.3.7  Main Link Inputs
      8. 8.3.8  Receiver Equalizer
      9. 8.3.9  CTLE Bypass
      10. 8.3.10 Input Signal Detect
      11. 8.3.11 Main Link Outputs
        1. 8.3.11.1 Transmitter Bias
        2. 8.3.11.2 Transmitter Impedance Control
        3. 8.3.11.3 TX Slew Rate Control
        4. 8.3.11.4 TX Pre-Emphasis and De-Emphasis Control
        5. 8.3.11.5 TX Swing Control
      12. 8.3.12 DDC Buffer
      13. 8.3.13 HDMI DDC Capacitance
      14. 8.3.14 DisplayPort
    4. 8.4 Device Functional Modes
      1. 8.4.1 MODE Control
        1. 8.4.1.1 I2C Mode (MODE = "F")
        2. 8.4.1.2 Pin Strap Modes
          1. 8.4.1.2.1 Pin-Strap: HDMI 1.4 and HDMI 2.0 Functional Description
      2. 8.4.2 DDC Snoop Feature
        1. 8.4.2.1 HDMI Type
      3. 8.4.3 Low Power Modes
    5. 8.5 Programming
      1. 8.5.1 Pseudocode Examples
        1. 8.5.1.1 HDMI 2.0 Source Example with DDC Snoop and DDC Buffer Enabled
      2. 8.5.2 TDP0604 I2C Address Options
      3. 8.5.3 I2C Target Behavior
    6. 8.6 Register Maps
      1. 8.6.1 TDP0604 Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Source-Side Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Pre-Channel (LAB)
        2. 9.2.2.2 Post-Channel (LCD)
        3. 9.2.2.3 Common Mode Choke
        4. 9.2.2.4 ESD Protection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Supply Decoupling
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.5.1.1 HDMI 2.0 Source Example with DDC Snoop and DDC Buffer Enabled

When using TDP0604's DDC buffer with snooping enabled, this example can be used.

This example will initialize the following:

  • Limited redriver mode with DC-coupled output.
  • TX slew rate for each data rate
  • CTLE used for each data rate.
  • Receiver EQ setting for each lane (D0, D1, and D2).
  • TX voltage swing for each lane (clock, D0, D1, and D2).
  • TX pre-emphasis/de-emphasis for HDMI 1.4 and 2.0. 


// (address, data)
// Initial power-on configuration.
(0x0A, 0x0A), // Rate snoop and TXFFE snoop enabled. 
(0x0B, 0x34), // 3G and 6G slew rate control 
(0x0C, 0x71), // HDMI clock slew rate 
(0x0D, 0x22), // Limited mode, DC-coupled TX, 0dB DCG, Auto Term, disable CTLE bypass 
(0x0E, 0x05), // HDMI14 and 2.0 CTLE selection
(0x10, 0x03), // Enabled DDC DCC correction and DDC buffer
(0x11, 0x0F), // HDMI1.4 and 2.0 VOD controlled per lane
(0x12, 0x03), // Clock lane VOD
(0x14, 0x03), // D0 lane VOD and TXFFE. 
(0x15, 0x0Y), // D0 lane EQ. Set "Y" to desired value.
(0x16, 0x03), // D1 lane VOD and TXFFE.
(0x17, 0x0Y), // D1 lane EQ. Set "Y" to desired value.
(0x18, 0x03), // D2 lane VOD and TXFFE.
(0x19, 0x0Y), // D2 lane EQ. Set "Y" to desired value.
(0x09, 0x00), // Take out of PD state. Should be done after initialization is complete.