JAJSJG6A december 2021 – june 2023 TDP0604
PRODUCTION DATA
The TDP0604 will always use the sampled state of EQ[1:0] pins when operating in either HDMI 1.4 and HDMI 2.0. The amount of EQ applied is determined by the CTLE Map used (for more information, refer to Section 8.3.8).
If TDP0604 is configured for limited redriver mode, the OUT_D[2:0] and OUT_CLKP/N levels will be fixed based on the sampled state of TXSWG pin (refer to Table 8-12) and TXPRE pin (refer to Table 8-11).
If TDP0604 is configured for linear redriver mode, then OUT_D[2:0] and OUT_CLK will be a linear function of the input signals.
MODE Pin Level | Description |
---|---|
0 | Pin Strap with DDC Buffer enabled |
R | Pin Strap with DDC Buffer disabled |
F | I2C mode |
1 | Reserved |