JAJSOY7A June   2008  – September 2023 TPS2551-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configurations and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 機能ブロック図
    3. 8.3 Feature Description
      1. 8.3.1 Overcurrent
      2. 8.3.2 Reverse-Voltage Protection
      3. 8.3.3 FAULT Response
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Enable (EN)
      6. 8.3.6 Thermal Sense
      7. 8.3.7 Device Functional Modes
    4. 8.4 Programming
      1. 8.4.1 Programming the Current-Limit Threshold
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Two-Level Current-Limit Circuit
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detail Design Procedure
        1. 9.2.3.1 Designing Above a Minimum Current Limit
        2. 9.2.3.2 Designing Below a Maximum Current Limit
        3. 9.2.3.3 Input and Output Capacitance
      4. 9.2.4 Auto-Retry Functionality
      5. 9.2.5 Latch-Off Functionality
      6. 9.2.6 Typical Application as USB Power Switch
        1. 9.2.6.1 Design Requirements
          1. 9.2.6.1.1 USB Power-Distribution Requirements
        2. 9.2.6.2 Detail Design Procedure
          1. 9.2.6.2.1 Universal Serial Bus (USB) Power-Distribution Requirements
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Self-Powered and Bus-Powered Hubs
      2. 9.3.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions
      3. 9.3.3 Power Dissipation and Junction Temperature
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.4 Thermal Information

BOARDPACKAGETHERMAL RESISTANCE
θJA		THERMAL RESISTANCE
θJC		TA ≤ 25°C
POWER RATING		DERATING
FACTOR ABOVE
TA = 25°C		TA = 70°C
POWER
RATING		TA = 85°C
POWER
RATING
Low-K(1)DBV350°C/W55°C/W285 mW2.85 mW/°C155 mW114 mW
High-K(2)DBV160°C/W55°C/W625 mW6.25 mW/°C340 mW250 mW
(1) The JEDEC low-K (1s) board used to derive this data was a 3-in × 3-in, two-layer board with 2-oz copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3-in × 3-in, multilayer board with 1-oz internal power and ground planes and 2-oz copper traces on top and bottom of the board.