SBAU427 July   2025 ADS131E08

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 Specification
  8. 2Hardware
    1. 2.1 EVM Analog Inputs
    2. 2.2 Power Supplies
    3. 2.3 ADC Connections and Decoupling
    4. 2.4 Voltage Reference
    5. 2.5 Op Amp Common-Mode Bias
    6. 2.6 Digital Interface
    7. 2.7 EEPROM
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 Optional EVM Configuration
    3. 4.3 GUI Software Operation
      1. 4.3.1 EVM Register Settings
      2. 4.3.2 GUI Settings for ADC Control
      3. 4.3.3 Time Domain Display
      4. 4.3.4 Frequency Domain Display
      5. 4.3.5 Histogram Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks

4.1 Hardware Connections

Connect the EVM as shown in Figure 4-1 after installing the software:

  1. Physically connect P2 of the PHI to J2 of the ADS131E08 EVM.
  2. Install the screws to provide a robust connection. Connect the USB on the PHI to the computer.
    1. LED D5 on the PHI lights up, indicating that the PHI is powered up.
    2. LEDs D1 and D2 on the PHI start blinking to indicate that the PHI is booted up and communicating with the PC.
  3. Start the software GUI by selecting from the start menu or associated shortcut as shown in Figure 4-2. Notice that the LEDs on the PHI blink slowly when the FPGA firmware is loaded on the PHI. Loading takes a few seconds.
  4. Connect the signal generator. The ADS131E08 analog inputs are fully differential. The differential input voltage (VINxP – VINxN) can span from –VREF / gain to VREF / gain. Use the ADS131E08 in a differential configuration to maximize the dynamic range of the data converter. For best performance, set the common-mode voltage at the midpoint of the analog supplies [(AVDD + AVSS) / 2].
ADS131E08EVM-PDK Hardware ConnectionsFigure 4-1 Hardware Connections
ADS131E08EVM-PDK Launch the ADS131E08EVM GUI SoftwareFigure 4-2 Launch the ADS131E08EVM GUI Software