SLAAER4 March   2025 AFE781H1 , AFE782H1 , AFE881H1 , AFE882H1 , DAC8740H , DAC8741H , DAC8742H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The 4-20mA Loop
    2. 1.2 The HART Protocol
      1. 1.2.1 Adding HART to the 4-20mA Loop
      2. 1.2.2 HART FSK
  5. 2AFE882H1 EVM-Based HART Transmitter
    1. 2.1 AFE882H1 HART Modem
    2. 2.2 AFE882H1 Evaluation Module
    3. 2.3 HART Transmitter Construction
      1. 2.3.1 Detailed Schematic
        1. 2.3.1.1 Input Protection
        2. 2.3.1.2 Start Up With Low-Dropout Regulator
        3. 2.3.1.3 Voltage-to-Current Stage
        4. 2.3.1.4 Voltage-to-Current Calculation
        5. 2.3.1.5 HART Signal Transmission
        6. 2.3.1.6 HART Input Protection
        7. 2.3.1.7 HART Transmitter Board
        8. 2.3.1.8 Current Consumption
      2. 2.3.2 HART Protocol Stack
  6. 3HART Testing and Registration
    1. 3.1  HART History and the FieldComm Group
    2. 3.2  HART Testing Overview
      1. 3.2.1 HART Protocol Specifications
      2. 3.2.2 HART Protocol Test Specifications
      3. 3.2.3 Field Transmitter Device Testing
    3. 3.3  HART Test Equipment
    4. 3.4  HART Physical Layer Testing
      1. 3.4.1 FSK Sinusoid Test
      2. 3.4.2 Carrier Start and Stop Time Tests
      3. 3.4.3 Carrier Start and Stop Transient Tests
      4. 3.4.4 Output Noise During Silence
      5. 3.4.5 Analog Rate of Change Test
      6. 3.4.6 Receive Impedance Test
      7. 3.4.7 Noise Sensitivity Test
      8. 3.4.8 Carrier Detect Test
    5. 3.5  Data Link Layer Tests
      1. 3.5.1 Data Link Layer Test Specifications
      2. 3.5.2 Data Link Layer Test Logs
    6. 3.6  Universal Command Tests
    7. 3.7  Common-Practice Command Tests
    8. 3.8  Device Specific Command Tests
    9. 3.9  HART Protocol Test Submission
    10. 3.10 HART Registration
  7. 4Summary
  8. 5Acknowledgments
  9. 6References

2.2 AFE882H1 Evaluation Module

The AFE882H1 front-end (FE) EVM is constructed as a field transmitter. The EVM uses a digital back-end board (DAC-FT-DBE) that connects to USB for control. The prototype versions of the two boards are shown in Figure 2-2.

AFE882H1 Evaluation Module with an FTDI Digital-Back-End Board Figure 2-2 AFE882H1 Evaluation Module with an FTDI Digital-Back-End Board

In the normal evaluation configuration, the board on the left is the DBE controller board. This board has a USB micro connection for computer control using a PC-based GUI. The DBE uses an FT4232H as the bridge between the USB and the digital communication with the AFE882H1. A 2x8 100mil connector joins the DBE board with the AFE882H1 FE EVM board.

The AFE882H1-FE-EVM board is shown on the right side of the figure. The board is constructed as a transmitter for a 4-20mA loop. The J6 terminal block on the right side board connects to an external 24V loop power supply. The current in the loop is set based on the DAC voltage output of the AFE882H1. When connected to the PC, the GUI sets the DAC output voltage and controls the current in the loop.

For this EVM, the board can be controlled by a GUI that can set the configuration of the device. The AFE882H1EVM GUI window is shown in Figure 2-3. The GUI is compatible with the AFE882H1-FE-EVM when connected to the DAC-FT-DBE.

AFE882H1EVM GUI Window Figure 2-3 AFE882H1EVM GUI Window