SLVA888C April   2017  – January 2021 TPS65987D , TPS65988

 

  1.   Trademarks
  2. 1Schematic Design Guidelines
    1. 1.1  Power Supply Scheme
      1. 1.1.1 VIN_3V3
      2. 1.1.2 LDO_3V3
      3. 1.1.3 LDO_1V8
    2. 1.2  Boot Configuration
      1. 1.2.1 BUSPOWER (ADCIN1)
      2. 1.2.2 External SPI Flash
    3. 1.3  I2C Interface
      1. 1.3.1 I2C Pin Address Setting (ADCIN2)
    4. 1.4  HRESET
    5. 1.5  Configuration Channel / VCONN Lines
      1. 1.5.1 PP_CABLE
    6. 1.6  Battery Charger Detection and Advertisement (BC1.2)
    7. 1.7  GPIOs
    8. 1.8  Hot Plug Detect or HPD Line
    9. 1.9  PP_EXT Power Path Control
    10. 1.10 Power Path Considerations
  3. 2Layout Guidelines
    1. 2.1 Power Domain
    2. 2.2 Hi Speed Lines
    3. 2.3 Other Considerations
  4. 3Summary
  5. 4References
  6.   A Appendix
    1.     A.1 Dead Battery Considerations
    2.     A.2 TPS65987DDH Schematic Checklist
    3.     A.3 TPS65987DDH System Checklist
  7.   Revision History

2.3 Other Considerations

This section covers other design considerations such as placement of components and other best practices to be followed.

  1. Try to reduce the distance between the Type-C receptacle and the CC pins of the PD Controller. Place the 220-pF capacitor close to the PD Controller. The capacitors on the CC lines help to tune the eye-diagram of CC signals.
  2. Place ESD diodes as close as possible to the Type-C receptacle.
  3. The ESD components must be placed without stubs in a pass through manner on the differential path.
  4. Keep all the power regulators away from the high speed signals and associated components.

GUID-818EB783-F9C9-4079-8059-CBCB94A5FFFD-low.png Figure 2-3 Placement of Capacitors on CC Lines