SLVA888C April   2017  – January 2021 TPS65987D , TPS65988

 

  1.   Trademarks
  2. 1Schematic Design Guidelines
    1. 1.1  Power Supply Scheme
      1. 1.1.1 VIN_3V3
      2. 1.1.2 LDO_3V3
      3. 1.1.3 LDO_1V8
    2. 1.2  Boot Configuration
      1. 1.2.1 BUSPOWER (ADCIN1)
      2. 1.2.2 External SPI Flash
    3. 1.3  I2C Interface
      1. 1.3.1 I2C Pin Address Setting (ADCIN2)
    4. 1.4  HRESET
    5. 1.5  Configuration Channel / VCONN Lines
      1. 1.5.1 PP_CABLE
    6. 1.6  Battery Charger Detection and Advertisement (BC1.2)
    7. 1.7  GPIOs
    8. 1.8  Hot Plug Detect or HPD Line
    9. 1.9  PP_EXT Power Path Control
    10. 1.10 Power Path Considerations
  3. 2Layout Guidelines
    1. 2.1 Power Domain
    2. 2.2 Hi Speed Lines
    3. 2.3 Other Considerations
  4. 3Summary
  5. 4References
  6.   A Appendix
    1.     A.1 Dead Battery Considerations
    2.     A.2 TPS65987DDH Schematic Checklist
    3.     A.3 TPS65987DDH System Checklist
  7.   Revision History

1.2.1 BUSPOWER (ADCIN1)

This pin is used for boot strap pin for device initialization. In dead battery operation, the chip voltage at the VBUS pin determines how the power is used. This pin along with the SPI_MISO pin with help to pick the right device configuration from the ROM. A potential divider should be used between LDO_3V3 and GND to pick the right configuration. Please refer the device data sheet for more information.

Important:

External resistor tolerance of 1% is required.

Do not connect ADCIN1 pin directly to Ground or LDO_3V3 rail. Use resistor divider as recommended in the data sheet.

GUID-20201220-CA0I-V5XH-QMPT-ZGSK858CBWGC-low.jpg Figure 1-2 ADCIN1 Resistor Divider Network