SLVA888C April   2017  – January 2021 TPS65987D , TPS65988

 

  1.   Trademarks
  2. 1Schematic Design Guidelines
    1. 1.1  Power Supply Scheme
      1. 1.1.1 VIN_3V3
      2. 1.1.2 LDO_3V3
      3. 1.1.3 LDO_1V8
    2. 1.2  Boot Configuration
      1. 1.2.1 BUSPOWER (ADCIN1)
      2. 1.2.2 External SPI Flash
    3. 1.3  I2C Interface
      1. 1.3.1 I2C Pin Address Setting (ADCIN2)
    4. 1.4  HRESET
    5. 1.5  Configuration Channel / VCONN Lines
      1. 1.5.1 PP_CABLE
    6. 1.6  Battery Charger Detection and Advertisement (BC1.2)
    7. 1.7  GPIOs
    8. 1.8  Hot Plug Detect or HPD Line
    9. 1.9  PP_EXT Power Path Control
    10. 1.10 Power Path Considerations
  3. 2Layout Guidelines
    1. 2.1 Power Domain
    2. 2.2 Hi Speed Lines
    3. 2.3 Other Considerations
  4. 3Summary
  5. 4References
  6.   A Appendix
    1.     A.1 Dead Battery Considerations
    2.     A.2 TPS65987DDH Schematic Checklist
    3.     A.3 TPS65987DDH System Checklist
  7.   Revision History

1.1.2 LDO_3V3

LDO_3V3 is the supply for the core chip. It can be powered from VIN_3V3 output of LDO driven from VBUS. LDO_3V3 is available whenever the chip is powered. Therefore, this rail can be used to power up the external SPI flash and I2C (or other) pull-ups in the system. This line can supply only 25 mA of current to external devices. Do not overload it by connecting un-necessary devices on this rail.